2 of 2 Remote/Hybrid SystemVerilog Jobs in Central London

areas like memory, interconnect, and high-speed interface design. Key Responsibilities: Develop and integrate designs of RTL for digital blocks (using Verilog/SystemVerilog/VHDL) Undertake Digital IC Design processes & perform design synthesis, linting Complete projects from conception to completion Skills Required: Experience with frontend RTL Design Strong Experience … with SystemVerilog, Verilog, or VHDL Has had exposure to ASIC design flow (Lint, synthesis, simulation) Digital Design Principles experience – pipelining, clock domain crossing Further Details: This role offers remote working with a potential visit the office every month. A competitive salary, bonus scheme, and a strong benefits package. ...

with quarterly visits to London. What You’ll Do Own unit‐level and core‐level verification for complex digital IP Build scalable SystemVerilog/UVM environments Develop constrained‐random and directed tests to drive high coverage Debug failures across RTL, testbench, and micro‐architecture Automate regressions and flows using Python … with modern IP ecosystems: microprocessor cores, memory subsystems, AMBA interconnects, system debug logic What You Bring 3–4+ years of digital verification experience Strong SystemVerilog/UVM expertise Solid understanding of digital logic and verification methodologies Experience with ARM‐based components (M‐class cores, NIC, Coresight, AMBA protocols) Familiarity with ...