2 of 2 Algorithms Jobs in Eastleigh

role focused on RTL design and implementation of complex IP for FPGA and ASIC. You’ll work across the full development lifecycle from translating algorithms into efficient hardware architectures through to RTL implementation, timing closure, FPGA validation and system integration working alongside Algorithm, Systems and Verification Engineers. What ...

grade signal processing hardware for high‐throughput, real-time DSP tasks. The role is hybrid with 2 days onsite in Southampton and involves translating algorithms into efficient hardware architectures and RTL implementations. You will work across the full development lifecycle, performing RTL design, timing closure, FPGA validation and system integration ...