Design Verification Engineer
- Hiring Organisation
- IC Resources
- Location
- Edinburgh, Scotland, United Kingdom
Minimum Qualifications Proven experience verifying complex SoC or subsystem-level designs. Strong background in DSP, wireless communication, or networking systems. Hands-on experience with Verilog, SystemVerilog, UVM, and/or VHDL. Solid understanding of verification methodologies, coverage, and debugging techniques. Experience with scripting languages such as Python, Tcl, Perl ...