The Redline Group are seeking an experienced Contract FPGA Design Engineer - Lattice to work with our Cambridgeshire based customer on an exciting new conceptual venture. This role is based on site and could open up potential long-term work. A well-established business in their industry, our customer … control the technology and respond to commands in real-time, operating faster and ultimately more efficiently. Key Skills Required - Contract FPGA Design Engineer - Lattice, Cambridgeshire: - Proven experience of FPGA Design using Lattice FPGAs - Experience of writing code in VHDL - Experience of using test benches and performing … PSC; you will therefore need to operate via an Umbrella company. For more information or to apply for the Contract FPGA Design Engineer - Lattice role in Cambridgeshire, please contact Maddie Ramsden - quoting reference MMR1043 More ❯
Experience designing FPGA/CPLDs based electronic products in a commercial environment - Experience in FPGA design from multiple vendors (Xilinx, Altera, Microsemi/Lattice, Achronix, Atmel, e2v) - Ability to embed processors into FPGA designs - Experience proving design concepts by simulating environments - Experience exploring and developing new technologies and More ❯
Experience designing FPGA/CPLDs based electronic products in a commercial environment - Experience in FPGA design from multiple vendors (Xilinx, Altera, Microsemi/Lattice, Achronix, Atmel, e2v) - Ability to embed processors into FPGA designs - Experience proving design concepts by simulating environments - Experience exploring and developing new technologies and More ❯
The Redline Group are seeking an experienced Contract FPGA Design Engineer - Lattice to work with our Cambridgeshire based customer on an exciting new conceptual venture. This role is based on site and could open up potential long-term work. A well-established business in their industry, our customer More ❯
Basildon, Essex, United Kingdom Hybrid / WFH Options
Leonardo
and test benches. What we are looking for: What you really must have: Using FPGA technologies especially from either Xilinx, Microsemi (Actel) or Lattice and their tools. Advanced verification techniques using either VHDL or System Verilog/UVM. Specifying complex timing and area constraints for efficient FPGA place More ❯
IEC 62443, ISO 26262 Required Experience Experience of developing RTL design for digital electronics systems for Xilinx device architectures (or AMD/Lattice) using VHDL Experience in FPGA-SoC-implementation of algorithms developed in MATLAB/Simulink (algorithm development out of scope) Strong verification expertise in OSVVM/ More ❯
IEC 62443, ISO 26262 Required Experience Experience of developing RTL design for digital electronics systems for Xilinx device architectures (or AMD/Lattice) using VHDL Experience in FPGA-SoC-implementation of algorithms developed in MATLAB/Simulink (algorithm development out of scope) Strong verification expertise in OSVVM/ More ❯
IEC 62443, ISO 26262 Required Experience Experience of developing RTL design for digital electronics systems for Xilinx device architectures (or AMD/Lattice) using VHDL Experience in FPGA-SoC-implementation of algorithms developed in MATLAB/Simulink (algorithm development out of scope) Strong verification expertise in OSVVM/ More ❯
IEC 62443, ISO 26262 Required Experience Experience of developing RTL design for digital electronics systems for Xilinx device architectures (or AMD/Lattice) using VHDL Experience in FPGA-SoC-implementation of algorithms developed in MATLAB/Simulink (algorithm development out of scope) Strong verification expertise in OSVVM/ More ❯
IEC 62443, ISO 26262 Required Experience Experience of developing RTL design for digital electronics systems for Xilinx device architectures (or AMD/Lattice) using VHDL Experience in FPGA-SoC-implementation of algorithms developed in MATLAB/Simulink (algorithm development out of scope) Strong verification expertise in OSVVM/ More ❯
IEC 62443, ISO 26262 Required Experience Experience of developing RTL design for digital electronics systems for Xilinx device architectures (or AMD/Lattice) using VHDL Experience in FPGA-SoC-implementation of algorithms developed in MATLAB/Simulink (algorithm development out of scope) Strong verification expertise in OSVVM/ More ❯
IEC 62443, ISO 26262 Required Experience Experience of developing RTL design for digital electronics systems for Xilinx device architectures (or AMD/Lattice) using VHDL Experience in FPGA-SoC-implementation of algorithms developed in MATLAB/Simulink (algorithm development out of scope) Strong verification expertise in OSVVM/ More ❯
IEC 62443, ISO 26262 Required Experience Experience of developing RTL design for digital electronics systems for Xilinx device architectures (or AMD/Lattice) using VHDL Experience in FPGA-SoC-implementation of algorithms developed in MATLAB/Simulink (algorithm development out of scope) Strong verification expertise in OSVVM/ More ❯
IEC 62443, ISO 26262 Required Experience Experience of developing RTL design for digital electronics systems for Xilinx device architectures (or AMD/Lattice) using VHDL Experience in FPGA-SoC-implementation of algorithms developed in MATLAB/Simulink (algorithm development out of scope) Strong verification expertise in OSVVM/ More ❯
IEC 62443, ISO 26262 Required Experience Experience of developing RTL design for digital electronics systems for Xilinx device architectures (or AMD/Lattice) using VHDL Experience in FPGA-SoC-implementation of algorithms developed in MATLAB/Simulink (algorithm development out of scope) Strong verification expertise in OSVVM/ More ❯
IEC 62443, ISO 26262 Required Experience Experience of developing RTL design for digital electronics systems for Xilinx device architectures (or AMD/Lattice) using VHDL Experience in FPGA-SoC-implementation of algorithms developed in MATLAB/Simulink (algorithm development out of scope) Strong verification expertise in OSVVM/ More ❯
IEC 62443, ISO 26262 Required Experience Experience of developing RTL design for digital electronics systems for Xilinx device architectures (or AMD/Lattice) using VHDL Experience in FPGA-SoC-implementation of algorithms developed in MATLAB/Simulink (algorithm development out of scope) Strong verification expertise in OSVVM/ More ❯
IEC 62443, ISO 26262 Required Experience Experience of developing RTL design for digital electronics systems for Xilinx device architectures (or AMD/Lattice) using VHDL Experience in FPGA-SoC-implementation of algorithms developed in MATLAB/Simulink (algorithm development out of scope) Strong verification expertise in OSVVM/ More ❯
IEC 62443, ISO 26262 Required Experience Experience of developing RTL design for digital electronics systems for Xilinx device architectures (or AMD/Lattice) using VHDL Experience in FPGA-SoC-implementation of algorithms developed in MATLAB/Simulink (algorithm development out of scope) Strong verification expertise in OSVVM/ More ❯
IEC 62443, ISO 26262 Required Experience Experience of developing RTL design for digital electronics systems for Xilinx device architectures (or AMD/Lattice) using VHDL Experience in FPGA-SoC-implementation of algorithms developed in MATLAB/Simulink (algorithm development out of scope) Strong verification expertise in OSVVM/ More ❯
IEC 62443, ISO 26262 Required Experience Experience of developing RTL design for digital electronics systems for Xilinx device architectures (or AMD/Lattice) using VHDL Experience in FPGA-SoC-implementation of algorithms developed in MATLAB/Simulink (algorithm development out of scope) Strong verification expertise in OSVVM/ More ❯
IEC 62443, ISO 26262 Required Experience Experience of developing RTL design for digital electronics systems for Xilinx device architectures (or AMD/Lattice) using VHDL Experience in FPGA-SoC-implementation of algorithms developed in MATLAB/Simulink (algorithm development out of scope) Strong verification expertise in OSVVM/ More ❯
IEC 62443, ISO 26262 Required Experience Experience of developing RTL design for digital electronics systems for Xilinx device architectures (or AMD/Lattice) using VHDL Experience in FPGA-SoC-implementation of algorithms developed in MATLAB/Simulink (algorithm development out of scope) Strong verification expertise in OSVVM/ More ❯
bradford, yorkshire and the humber, united kingdom
Akkodis
IEC 62443, ISO 26262 Required Experience Experience of developing RTL design for digital electronics systems for Xilinx device architectures (or AMD/Lattice) using VHDL Experience in FPGA-SoC-implementation of algorithms developed in MATLAB/Simulink (algorithm development out of scope) Strong verification expertise in OSVVM/ More ❯
IEC 62443, ISO 26262 Required Experience Experience of developing RTL design for digital electronics systems for Xilinx device architectures (or AMD/Lattice) using VHDL Experience in FPGA-SoC-implementation of algorithms developed in MATLAB/Simulink (algorithm development out of scope) Strong verification expertise in OSVVM/ More ❯
