Senior Hardware Engineer | RISC-V | CPUs |
Cambridge, England, United Kingdom
Hybrid / WFH Options
Hybrid / WFH Options
Codasip
motivated self-starters who enjoy working on something revolutionary in an innovative company. To be responsible for the microarchitecture definition and implementation of RISC-V processors and extensions Processor development within the Codasip Architectural Language (CodAL) Undertaking design synthesis and results analysis to ensure PPA targets can be … Analytical thinking, self-sufficiency, team collaboration Ability to work across teams to debug issues and find root causes NICE-TO-HAVE: Knowledge of RISC-V instruction set Advanced knowledge of computer systems and architecture Experience of Synthesis, Design for Test and Timing Analysis Experience of low power design … unique competitive advantage by empowering their system-on-chip developers to build the most innovative products. Our processor cores are based on the RISC-V open architecture. The potential for customizing RISC-V is unlocked with the Codasip Custom Compute approach: our unique architecture description language more »
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