2 of 2 Remote UVM Jobs in Glasgow

Siemens - QuestaSim/ModelSim, Questa PropCheck, FormalPro Synopsys - Synplify Pro Standards, Frameworks and Techniques Knowledge and experience of safety standards such as IEC 61513, IEC 62566, IEC26262, DO 254 UVM Constrained Random Testing Formal Verification Languages: VHDL, SystemVerilog, TCL, Python We're an equal opportunities employer. We're committed to developing a diverse workforce and an inclusive working environment. We More ❯

to production and delivery/tape-out, including performance review, analysis, costing, and optimisation Understanding of the product's design & verification needs, standardisation, adherence to frameworks and methodolgies e.g. UVM Excellent communicator, with a keen interest in team collaboration and a clear approach to the design & development process Bonus/"Nice-to-have" skills Digital Video processing/video compression More ❯