drop Perform Power Integrity (PI) analysis, including IR drop , decoupling capacitor optimization , transient response analysis, and power rail validation Create schematics using Cadence OrCAD Capture , Allegro , or equivalent EDA tools Define PCB stack-up , HDI (High-Density Interconnect) technology, and multilayer PCB requirements Collaborate with the PCB Layout Team … Integrity (SI) principles and high-speed design methodologies Experience with PCB Stack-up , HDI Technology , and High-Layer-Count PCB Design Proficiency with Cadence OrCAD Capture , Allegro , or equivalent PCB Design Tools Experience reviewing PCB Layouts for High-Speed , Power Integrity , and RF design considerations Hands‐on experience with ...