in a team-oriented environment. Certification Process: Experience of DO-254 certification process throughout all (SOI) Stages of Involvement phases. Desired Characteristics: Experience of other hardware description languages (e.g Verilog). Understanding of other verification methods (e.g Universal Verification Methodology (UVM . Familiarity with embedded software designs using C/C++. This job description is not designed to cover or More ❯
technology, embedded systems, or software-defined radio. You'll have significant experience in some or all of the following areas: FPGA design, including experience in languages such as VHDL, Verilog, and High-Level Synthesis Modelling tools such as MATLAB and Simulink Radio communications and Digital Signal Processing (DSP) techniques Software Defined Radio (SDR) and RF techniques Software Development Development of More ❯
colleagues across the whole design flow: micro-architecture, design, verification, physical implementation and optimisation for ASIC and FPGA Skills, Knowledge and Expertise Essential: Expert knowledge of an RTL language (Verilog, SystemVerilog) for complex ASIC/FPGA products A strong skillset in delivering digital designs in the ASIC and FPGA industry Optimisation of timing and hardware resources for high throughput data More ❯
through regular mentoring, coaching, and feedback Skills, Knowledge & Expertise Essential Skills and Experience: Track record of building and leading high performing collaborative teams Expert knowledge of an RTL design (Verilog, SystemVerilog) for complex ASIC/FPGA products A strong skillset in delivery of digital designs for ASIC and FPGA Optimisation of timing and hardware resources for high throughput data or More ❯
advanced FPGAs and space-qualified ASICs. As an FPGA Engineer, you will: Translate complex signal processing algorithms into efficient RTL architectures Design and verify FPGA and ASIC IP using Verilog/SystemVerilog Validate and integrate designs on the latest FPGA development platforms Collaborate across architecture, verification, and physical implementation teams Contribute to UVM test environments and technical documentation Key skills … required for the FPGA Engineer: Strong RTL experience (Verilog/SystemVerilog) targeting FPGAs or ASICs Skilled in timing closure, synthesis, and power/resource optimisation Experience working on high-throughput digital signal processing blocks Familiarity with communications algorithms (e.g. FEC, beamforming) is a bonus Knowledge of UVM, scripting (Python), or AMBA protocols is desirable If you’re interested in the More ❯
block level definition & specification ADDITIONAL USEFUL EXPERIENCE: System simulation Integrated single chip RF + digital baseband projects Top level chip simulation and functional verification Analogue behavioral language modeling (e.g. Verilog-AMS) Mixed-mode simulation environments (e.g. mixed Verilog and device level) Direct conversion Rx and Tx architectures and associated considerations DFT and BIST for analogue and RF circuits Silicon test More ❯
block level definition & specification ADDITIONAL USEFUL EXPERIENCE: System simulation Integrated single chip RF + digital baseband projects Top level chip simulation and functional verification Analogue behavioral language modeling (e.g. Verilog-AMS) Mixed-mode simulation environments (e.g. mixed Verilog and device level) Direct conversion Rx and Tx architectures and associated considerations DFT and BIST for analogue and RF circuits Silicon test More ❯
verification solutions. Key Responsibilities: Perform SOC verification with a focus on ARM ecosystem and PCIe, including PCIe-VIP usage. Develop and execute test plans, test benches, and simulations using Verilog, SystemVerilog, and UVM. Conduct GLS (Gate Level Simulation) and ensure comprehensive code and functional coverage. Collaborate with onsite and offshore teams to coordinate verification activities and deliverables. Utilize GIT for … strong analytical and problem-solving skills throughout the verification process. Skills, Experience, and Abilities Required: 5 to 10 years of industry experience in SOC/IP verification. Expertise in Verilog, SystemVerilog, and UVM. Strong experience with code coverage, functional coverage, and test development. Hands-on experience with ARM ecosystem and PCIe protocols. Proficient in C/SystemVerilog and familiar with More ❯
verification solutions. Key Responsibilities: Perform SOC verification with a focus on ARM ecosystem and PCIe, including PCIe-VIP usage. Develop and execute test plans, test benches, and simulations using Verilog, SystemVerilog, and UVM. Conduct GLS (Gate Level Simulation) and ensure comprehensive code and functional coverage. Collaborate with onsite and offshore teams to coordinate verification activities and deliverables. Utilize GIT for … strong analytical and problem-solving skills throughout the verification process. Skills, Experience, and Abilities Required: 5 to 10 years of industry experience in SOC/IP verification. Expertise in Verilog, SystemVerilog, and UVM. Strong experience with code coverage, functional coverage, and test development. Hands-on experience with ARM ecosystem and PCIe protocols. Proficient in C/SystemVerilog and familiar with More ❯
verification solutions. Key Responsibilities: Perform SOC verification with a focus on ARM ecosystem and PCIe, including PCIe-VIP usage. Develop and execute test plans, test benches, and simulations using Verilog, SystemVerilog, and UVM. Conduct GLS (Gate Level Simulation) and ensure comprehensive code and functional coverage. Collaborate with onsite and offshore teams to coordinate verification activities and deliverables. Utilize GIT for … strong analytical and problem-solving skills throughout the verification process. Skills, Experience, and Abilities Required: 5 to 10 years of industry experience in SOC/IP verification. Expertise in Verilog, SystemVerilog, and UVM. Strong experience with code coverage, functional coverage, and test development. Hands-on experience with ARM ecosystem and PCIe protocols. Proficient in C/SystemVerilog and familiar with More ❯