and techniques Experience of working in an FPGA development team Desirable: Experience of digital hardware design for FPGA using VHDL Experience and knowledge of videoprocessing and control law algorithms Working knowledge and experience of UVM (Universal Verification Methodology) constrained random verification This really is a fantastic opportunity More ❯
development experience Proficient in VHDL, synthesis, simulation, and verification tools Solid grasp of design constraints and system integration Bonus if you bring: Experience with videoprocessing or control algorithms Knowledge of UVM and constrained-random verification Background in safety-critical or high-integrity systems Disclaimer: This vacancy is More ❯
development experience Proficient in VHDL, synthesis, simulation, and verification tools Solid grasp of design constraints and system integration Bonus if you bring: Experience with videoprocessing or control algorithms Knowledge of UVM and constrained-random verification Background in safety-critical or high-integrity systems Disclaimer: This vacancy is More ❯
