present complex technical concepts effectively. PREFERRED QUALIFICATIONS - Knowledge of Yocto Project or other embedded Linux build systems. - Understanding of hardware chipset architectures (e.g. ARM, RISCV) - Understanding of hardware interfaces (e.g., I2C, SPI, PCIe). - Experience with reading and understanding hardware schematics. - Experience shipping products with Linux BSPs. - Familiarity with ALSA More ❯
have demonstrated experience with some of the following technologies: Computer graphics APIs such as OpenGL or Vulkan RTL design in Verilog ARM/RISC-V architecture concepts Modern software design practices in C++ Knowledge of compilers and tool chains Computer architectures Docker containers FPGA tool flows More ❯
in ASIC and SoC design. We are looking for engineers with proven experience in several of the following areas: •Computer architectures (ARM or RISC-V) •SystemVerilog •UVM Verification •Digital verification using SystemVerilog, UVM, or cocotb •Formal Verification •Interconnect protocols such as AXI or OCP •ASIC tool flows •Familiarity More ❯
guiding important design decisions. We unify the domains of deterministic computation and performance to build a proof-generating virtual machine which runs common RISC-V Linux programs. This tool allows us to verify what is being run and ensure that it is being run according to our set More ❯
Senior Software Engineer - RISC-V at Trilitech, powered by Tezos Our Team At Trilitech, our mission is to power the Web3 revolution by building cutting-edge solutions on the Tezos blockchain. We specialise in core development, application development, and business development across three key areas: Culture, Decentralised Finance More ❯
Staff Software Engineer - RISC-V at Trilitech, powered by Tezos Our Team At Trilitech, our mission is to power the Web3 revolution by building cutting-edge solutions on the Tezos blockchain. We specialise in core development, application development, and business development across three key areas: Culture, Decentralised Finance More ❯
Software Engineer - Compiler Role Overview: Develop and optimize compiler technologies for our RISC-V vector core, focusing on efficient code generation and optimization for graphics and AI workloads. Key Responsibilities: Develop and maintain compiler backend for our RISC-V vector extensions Implement code generation and optimization … similar compiler infrastructure Experience with code generation for vector architectures Understanding of graphics shader compilers and/or AI compiler stacks Familiarity with RISC-V architecture and vector extensions (preferred) Strong C++ programming skills Background in performance analysis and optimization More ❯
Software Engineer - Compiler Role Overview: Develop and optimize compiler technologies for our RISC-V vector core, focusing on efficient code generation and optimization for graphics and AI workloads. Key Responsibilities: Develop and maintain compiler backend for our RISC-V vector extensions Implement code generation and optimization … similar compiler infrastructure Experience with code generation for vector architectures Understanding of graphics shader compilers and/or AI compiler stacks Familiarity with RISC-V architecture and vector extensions (preferred) Strong C++ programming skills Background in performance analysis and optimization More ❯
Develop and optimize compiler technologies for our RISC-V vector core, focusing on efficient code generation and optimization for graphics and AI workloads. Key Responsibilities: Develop and maintain compiler backend for our RISC-V vector extensions Implement code generation and optimization passes for graphics and AI … similar compiler infrastructure Experience with code generation for vector architectures Understanding of graphics shader compilers and/or AI compiler stacks Familiarity with RISC-V architecture and vector extensions (preferred) Strong C++ programming skills Background in performance analysis and optimization BS/MS in Computer Science or related More ❯
