have demonstrated experience with some of the following technologies: Computer graphics APIs such as OpenGL or Vulkan RTL design in Verilog ARM/RISC-V architecture concepts Modern software design practices in C++ Knowledge of compilers and tool chains Computer architectures Docker containers FPGA tool flows More ❯
in ASIC and SoC design. We are looking for engineers with proven experience in several of the following areas: •Computer architectures (ARM or RISC-V) •FPGA Development •VHDL/Verilog •SystemVerilog •UVM Verification •Interconnect protocols such as AXI or OCP Requirements: •Be part of innovative, high-impact projects More ❯
in ASIC and SoC design. We are looking for engineers with proven experience in several of the following areas: •Computer architectures (ARM or RISC-V) •SystemVerilog •UVM Verification •Digital verification using SystemVerilog, UVM, or cocotb •Formal Verification •Interconnect protocols such as AXI or OCP •ASIC tool flows •Familiarity More ❯
guiding important design decisions. We unify the domains of deterministic computation and performance to build a proof-generating virtual machine which runs common RISC-V Linux programs. This tool allows us to verify what is being run and ensure that it is being run according to our set More ❯
Senior Software Engineer - RISC-V at Trilitech, powered by Tezos Our Team At Trilitech, our mission is to power the Web3 revolution by building cutting-edge solutions on the Tezos blockchain. We specialise in core development, application development, and business development across three key areas: Culture, Decentralised Finance More ❯
Staff Software Engineer - RISC-V at Trilitech, powered by Tezos Our Team At Trilitech, our mission is to power the Web3 revolution by building cutting-edge solutions on the Tezos blockchain. We specialise in core development, application development, and business development across three key areas: Culture, Decentralised Finance More ❯
