26 to 50 of 55 Design Engineer Jobs in the Midlands

Principal Mechanical Design Engineer Location: Wolverhampton, UK Company: Global Engineering OEM Salary: £75,000 basic + Excellent Pension + Flexible & Hybrid Working + Outstanding Benefits About the Principal Mechanical Design Engineer Role We're hiring a Principal Mechanical Design Engineer to join a global leader in complex engineering solutions based near Wolverhampton. This is … a senior-level opportunity to lead the design and development of bespoke heavy engineering projects, including welded, fabricated, and machined machinery and equipment. You'll be responsible for delivering high-integrity systems across the full design lifecycle-from FEED (Front-End Engineering Design) to final delivery-while driving innovation, safety, and engineering excellence. Key Responsibilities of the … Principal Mechanical Design Engineer: Lead the mechanical design of custom-engineered systems for industrial and safety-critical applications. Manage projects through the full design lifecycle, from concept and FEED to detailed design and manufacture. Apply advanced CAD (e.g., SolidWorks, Inventor) and FEA (e.g., ANSYS, Abaqus) tools to develop and validate designs. Ensure compliance with industry More ❯

Design Evaluation Engineer: Key Responsibilities: Perform detailed design evaluations and testing of electronic hardware. Run, debug, and create VIs (Virtual Instruments) using LabView for bench tests. Utilize hardware knowledge to operate and debug validation boards. Develop a comprehensive understanding of multi-phase multi-rail Switched-Mode Power Supplies (SMPS). Conduct performance analysis and validation of new … designs. Collaborate with cross-functional teams to identify and resolve design issues. Document test results, create reports, and provide recommendations for design improvements. Required Skills and Experience: LabView Proficiency: Extensive experience with LabView for running, debugging, and creating VIs for bench testing. Hardware Expertise: Strong knowledge and hands-on experience with hardware, specifically for operating and debugging validation … boards. SMPS Knowledge: In-depth understanding of multi-phase multi-rail SMPS design and functionality. Testing and Evaluation: Proven experience in testing and evaluating electronic designs and systems. Problem-Solving: Excellent analytical and problem-solving skills to identify issues and provide effective solutions. Documentation: Ability to document processes, results, and recommendations clearly and concisely. Collaboration: Strong interpersonal skills to More ❯

Controls & Instrumentation Design & Development Engineer Stafford Are you ready to take on a career-defining opportunity in the aerospace industry? This is your chance to join a company at the forefront of rotorcraft technology as a Controls & Instrumentation Design & Development Engineer. This role offers the chance to work on cutting-edge projects that push the boundaries of … systems to flight test campaigns, you'll be part of a dynamic and forward-thinking team that values technical excellence and collaboration. What You Will Do as Controls & Instrumentation Engineer; Design and implement advanced instrumentation and control systems to support helicopter development and testing Specify and integrate sensors, such as rotor load cells, strain gauges, and accelerometers, into … high-performance rotary-wing aircraft Develop system architectures and create detailed design documentation, including wiring schematics and sensor installation drawings Contribute to the development and integration of helicopter-specific test rigs, such as rotor test stands and avionics integration benches Configure and maintain flight test instrumentation systems, data acquisition systems, and telemetry Ensure compliance with relevant aerospace standards What More ❯

s vital power needs. Due to a number of exciting change and transformational activities across the Rolls-Royce business we are now seeking to add a number of Systems Design Integration Engineers. As a Systems Design Integration Engineer you will extract, understand and define technical requirements working alongside stakeholders to develop potential solutions. You will have knowledge … problem resolution, designing and integrating products, both physical & functional systems & product systems, performing technical analysis, as well as defining verification strategies for them throughout the product lifecycle. The Systems Design Integration Engineer will be based in Bristol 3 days per week, with 2 days spent remote working. Youll be responsible for: Systematically investigating and understanding problems; Safety, Quality … at platform, system, sub-system, component, component feature and manufacturing process level. Defining and interpreting product definition and documentation. Develop product verification strategies and compliance statements Demonstrating ability to engineer complex (electro, fluid, thermal, mechanical) systems. Integrating outward to platform and customer environment and inwards through product systems and sub-systems. Defining creative, robust, optimised, solutions managing risk and More ❯

s vital power needs. Due to a number of exciting change and transformational activities across the Rolls-Royce business we are now seeking to add a number of Systems Design Integration Engineers. As a Systems Design Integration Engineer you will extract, understand and define technical requirements working alongside stakeholders to develop potential solutions. You will have knowledge … problem resolution, designing and integrating products, both physical & functional systems & product systems, performing technical analysis, as well as defining verification strategies for them throughout the product lifecycle. The Systems Design Integration Engineer will be based in Derby 3 days per week, with 2 days spent remote working. Youll be responsible for: Be accountable for the execution of the … sub-system design and integration process through APQP and integration of other team members to achieve this. Design of sub-systems using Systems Engineering principles including the use of Robust Design, Systems Engineering, Risk Management (FMEA) and Model Based Systems Engineering (MBSE) techniques to achieve optimum solutions at product and sub-system level. Support the transition to More ❯

year of employment) Employee assistance program Enhanced maternity & paternity policies Mtrecs new opportunity: MTrec Recruitment are proudly representing our specialist manufacturing client in the search for an experienced Applications Design Engineer. The business requires a candidate to collaborate with customers and internal teams to provide viable engineering solutions and services. If you meet the person specification below, apply now … About you: Bachelors degree in mechanical engineering or a related technical field. Relevant experience in applications engineering or similar technical support role Proficient in CAD software or similar engineering design tools. Strong understanding of fluid dynamics, thermodynamics, and mechanical systems. Experience with performance testing and analysis is desirable. Experience with ERP and CRM systems (e.g. SAP, Salesforce) is desirable. More ❯

basic 3-5 years experience £40,000 - £45,000 basic 5-10 years experience £45,000 - 60,000 basic 10 years + £60,000 - £70,000 basic The Sprinkler Design Engineer will be responsible for the design and layout of fire sprinkler systems for commercial and industrial projects. The role requires a deep understanding of fire protection … well as proficiency in design. The ideal candidate will work closely with project managers, engineers, and clients to ensure designs meet all requirements and are completed on time. Sprinkler Design Key Responsibilities: Design and layout fire sprinkler systems in accordance with British Standards (BS EN 12845) and other relevant regulations. Prepare detailed design drawings using AutoCAD or … similar design software. Collaborate with project managers, engineers, and clients to understand project requirements and specifications. Perform site visits to assess project conditions and gather necessary data. Ensure all designs are compliant Assist in the preparation of project documentation, including technical specifications and material lists. Sprinkler Design Experience: Proficient in AutoCAD Excellent attention to detail and problem-solving More ❯

Social network you want to login/join with: Design Verification Engineer, Stoke-on-Trent Client: ALOIS Solutions Location: Stoke-on-Trent, United Kingdom Job Category: Other EU work permit required: Yes Job Views: 1 Posted: 31.05.2025 Expiry Date: 15.07.2025 Job Description: Verify CPU connectivity to IP blocks (using ASM boot , and C code, GNU toolchain ) Write test … plans, define test methodologies, develop test benches, write test cases, complete functional verification, and close coverage for all the design blocks in the SoCs/Subsystems Run regressions, debug test failures, and file bug reports as needed Develop tests to meet functional and code coverage requirements based on analysis of coverage gaps Provide verification reports showing all tests passing … on the RTL Use methodologies including design checks, verification techniques with simulators and emulators: UVM, formal, Verilog/SystemVerilog-based testbenches, and C, SystemVerilog, UVM-based test cases #J-18808-Ljbffr More ❯

Social network you want to login/join with: Design Verification Engineer, northampton col-narrow-left Client: ALOIS Solutions Location: northampton, United Kingdom Job Category: Other - EU work permit required: Yes col-narrow-right Job Views: 1 Posted: 31.05.2025 Expiry Date: 15.07.2025 col-wide Job Description: • Verify CPU connectivity to IP blocks (using ASM boot , and C code … GNU toolchain ) • The tasks will include writing test plans, defining test methodologies, developing test benches, writing testcases, completing functional verification and closing coverage for all the agreed design blocks in the SoCs/Subsystems • Run regressions, debug test failures and file bug report as needed. • Develop tests to meet functional coverage and code coverage requirements defined for the project … based on analysis of coverage gaps. • Provide verification report as needed to show all implemented tests passing on the RTL. • Methodologies will include a mix of design checks, verification techniques using simulators and emulators: UVM, formal, Verilog/System Verilog based testbenches and C, System Verilog, UVM based testcases #J-18808-Ljbffr More ❯

Design Verification: • Create coverage driven verification plan document. • Create UVM verification environment. • Verify CPU connectivity to IP blocks (using ASM boot, and C code, GNU toolchain) • The tasks will include writing test plans, defining test methodologies, developing test benches, writing testcases, completing functional verification and closing coverage for all the agreed design blocks in the SoCs/Subsystems … for the project, based on analysis of coverage gaps. • Provide verification report as needed to show all implemented tests passing on the RTL. • Methodologies will include a mix of design checks, verification techniques using simulators and emulators: UVM, formal, Verilog/System Verilog based testbenches and C, System Verilog, UVM based testcases More ❯

Design Verification: • Create coverage driven verification plan document. • Create UVM verification environment. • Verify CPU connectivity to IP blocks (using ASM boot, and C code, GNU toolchain) • The tasks will include writing test plans, defining test methodologies, developing test benches, writing testcases, completing functional verification and closing coverage for all the agreed design blocks in the SoCs/Subsystems … for the project, based on analysis of coverage gaps. • Provide verification report as needed to show all implemented tests passing on the RTL. • Methodologies will include a mix of design checks, verification techniques using simulators and emulators: UVM, formal, Verilog/System Verilog based testbenches and C, System Verilog, UVM based testcases More ❯

Design Verification: • Create coverage driven verification plan document. • Create UVM verification environment. • Verify CPU connectivity to IP blocks (using ASM boot, and C code, GNU toolchain) • The tasks will include writing test plans, defining test methodologies, developing test benches, writing testcases, completing functional verification and closing coverage for all the agreed design blocks in the SoCs/Subsystems … for the project, based on analysis of coverage gaps. • Provide verification report as needed to show all implemented tests passing on the RTL. • Methodologies will include a mix of design checks, verification techniques using simulators and emulators: UVM, formal, Verilog/System Verilog based testbenches and C, System Verilog, UVM based testcases More ❯

Design Verification: • Create coverage driven verification plan document. • Create UVM verification environment. • Verify CPU connectivity to IP blocks (using ASM boot, and C code, GNU toolchain) • The tasks will include writing test plans, defining test methodologies, developing test benches, writing testcases, completing functional verification and closing coverage for all the agreed design blocks in the SoCs/Subsystems … for the project, based on analysis of coverage gaps. • Provide verification report as needed to show all implemented tests passing on the RTL. • Methodologies will include a mix of design checks, verification techniques using simulators and emulators: UVM, formal, Verilog/System Verilog based testbenches and C, System Verilog, UVM based testcases More ❯

Design Verification: • Create coverage driven verification plan document. • Create UVM verification environment. • Verify CPU connectivity to IP blocks (using ASM boot, and C code, GNU toolchain) • The tasks will include writing test plans, defining test methodologies, developing test benches, writing testcases, completing functional verification and closing coverage for all the agreed design blocks in the SoCs/Subsystems … for the project, based on analysis of coverage gaps. • Provide verification report as needed to show all implemented tests passing on the RTL. • Methodologies will include a mix of design checks, verification techniques using simulators and emulators: UVM, formal, Verilog/System Verilog based testbenches and C, System Verilog, UVM based testcases More ❯

Design Verification: • Create coverage driven verification plan document. • Create UVM verification environment. • Verify CPU connectivity to IP blocks (using ASM boot, and C code, GNU toolchain) • The tasks will include writing test plans, defining test methodologies, developing test benches, writing testcases, completing functional verification and closing coverage for all the agreed design blocks in the SoCs/Subsystems … for the project, based on analysis of coverage gaps. • Provide verification report as needed to show all implemented tests passing on the RTL. • Methodologies will include a mix of design checks, verification techniques using simulators and emulators: UVM, formal, Verilog/System Verilog based testbenches and C, System Verilog, UVM based testcases More ❯

Design Verification: • Create coverage driven verification plan document. • Create UVM verification environment. • Verify CPU connectivity to IP blocks (using ASM boot, and C code, GNU toolchain) • The tasks will include writing test plans, defining test methodologies, developing test benches, writing testcases, completing functional verification and closing coverage for all the agreed design blocks in the SoCs/Subsystems … for the project, based on analysis of coverage gaps. • Provide verification report as needed to show all implemented tests passing on the RTL. • Methodologies will include a mix of design checks, verification techniques using simulators and emulators: UVM, formal, Verilog/System Verilog based testbenches and C, System Verilog, UVM based testcases More ❯

Design Verification: • Create coverage driven verification plan document. • Create UVM verification environment. • Verify CPU connectivity to IP blocks (using ASM boot, and C code, GNU toolchain) • The tasks will include writing test plans, defining test methodologies, developing test benches, writing testcases, completing functional verification and closing coverage for all the agreed design blocks in the SoCs/Subsystems … for the project, based on analysis of coverage gaps. • Provide verification report as needed to show all implemented tests passing on the RTL. • Methodologies will include a mix of design checks, verification techniques using simulators and emulators: UVM, formal, Verilog/System Verilog based testbenches and C, System Verilog, UVM based testcases More ❯

Design Verification: • Create coverage driven verification plan document. • Create UVM verification environment. • Verify CPU connectivity to IP blocks (using ASM boot, and C code, GNU toolchain) • The tasks will include writing test plans, defining test methodologies, developing test benches, writing testcases, completing functional verification and closing coverage for all the agreed design blocks in the SoCs/Subsystems … for the project, based on analysis of coverage gaps. • Provide verification report as needed to show all implemented tests passing on the RTL. • Methodologies will include a mix of design checks, verification techniques using simulators and emulators: UVM, formal, Verilog/System Verilog based testbenches and C, System Verilog, UVM based testcases More ❯

Design Verification: • Create coverage driven verification plan document. • Create UVM verification environment. • Verify CPU connectivity to IP blocks (using ASM boot, and C code, GNU toolchain) • The tasks will include writing test plans, defining test methodologies, developing test benches, writing testcases, completing functional verification and closing coverage for all the agreed design blocks in the SoCs/Subsystems … for the project, based on analysis of coverage gaps. • Provide verification report as needed to show all implemented tests passing on the RTL. • Methodologies will include a mix of design checks, verification techniques using simulators and emulators: UVM, formal, Verilog/System Verilog based testbenches and C, System Verilog, UVM based testcases More ❯

Design Verification: • Create coverage driven verification plan document. • Create UVM verification environment. • Verify CPU connectivity to IP blocks (using ASM boot, and C code, GNU toolchain) • The tasks will include writing test plans, defining test methodologies, developing test benches, writing testcases, completing functional verification and closing coverage for all the agreed design blocks in the SoCs/Subsystems … for the project, based on analysis of coverage gaps. • Provide verification report as needed to show all implemented tests passing on the RTL. • Methodologies will include a mix of design checks, verification techniques using simulators and emulators: UVM, formal, Verilog/System Verilog based testbenches and C, System Verilog, UVM based testcases More ❯

Design Verification: • Create coverage driven verification plan document. • Create UVM verification environment. • Verify CPU connectivity to IP blocks (using ASM boot, and C code, GNU toolchain) • The tasks will include writing test plans, defining test methodologies, developing test benches, writing testcases, completing functional verification and closing coverage for all the agreed design blocks in the SoCs/Subsystems … for the project, based on analysis of coverage gaps. • Provide verification report as needed to show all implemented tests passing on the RTL. • Methodologies will include a mix of design checks, verification techniques using simulators and emulators: UVM, formal, Verilog/System Verilog based testbenches and C, System Verilog, UVM based testcases More ❯

Design Verification: • Create coverage driven verification plan document. • Create UVM verification environment. • Verify CPU connectivity to IP blocks (using ASM boot, and C code, GNU toolchain) • The tasks will include writing test plans, defining test methodologies, developing test benches, writing testcases, completing functional verification and closing coverage for all the agreed design blocks in the SoCs/Subsystems … for the project, based on analysis of coverage gaps. • Provide verification report as needed to show all implemented tests passing on the RTL. • Methodologies will include a mix of design checks, verification techniques using simulators and emulators: UVM, formal, Verilog/System Verilog based testbenches and C, System Verilog, UVM based testcases More ❯

HV Cable Design Engineer (Outside IR35 Contract) Location: Hybrid - Offices in Birmingham, Glasgow, and other UK locations Contract Type: Outside IR35 Duration: Initial contract with potential to go permanent Industry: Transmission & Distribution (T&D) - Substations About the Role: We are seeking a skilled HV Cable Design Engineer to join a dynamic team on an outside IR35 … design. This is a fantastic opportunity for a contractor looking for a long-term engagement, with the option to transition into a permanent position in the future. Key Responsibilities: Design and specification of HV cable systems (typically 33kV to 400kV) for substation and transmission projects. Perform cable routing, thermal analysis, and cable pulling calculations. Prepare detailed design documentation … drawings, and technical reports. Collaborate with civil, electrical, and protection teams to ensure integrated design solutions. Support project delivery from concept through to commissioning. Ensure compliance with relevant UK and international standards (e.g., IEC, BS, ENA). Engage with clients, suppliers, and stakeholders to ensure design requirements are met. Requirements: Proven experience in HV cable design within More ❯

Design Verification: • Create coverage driven verification plan document. • Create UVM verification environment. • Verify CPU connectivity to IP blocks (using ASM boot, and C code, GNU toolchain) • The tasks will include writing test plans, defining test methodologies, developing test benches, writing testcases, completing functional verification and closing coverage for all the agreed design blocks in the SoCs/Subsystems … for the project, based on analysis of coverage gaps. • Provide verification report as needed to show all implemented tests passing on the RTL. • Methodologies will include a mix of design checks, verification techniques using simulators and emulators: UVM, formal, Verilog/System Verilog based testbenches and C, System Verilog, UVM based testcases More ❯

Assistant Design Engineer (Utilities) Our client has had immense growth year on year, with offices located around the UK. They strive to be market leaders and are looking for motivated individuals to join us on our journey and to be part of our bright future. Salary: £28,000 Location: Northampton Job Type: Perm Hours: Monday – Friday 8:30am … 00pm (40 hours per week) The Candidate: As an Assistant Design Engineer, you will assist the Design Engineers by producing draft designs and technical drawings using AutoCAD and design calculation software. You will work to the company policies and industry standards, whilst value engineering or maintaining gross margin as predicted by the Tendering Engineers. You will … and the client’s installation processes. Duties: Assist in the production of compliant designs in accordance with customer requirements and industry standards Understand and apply ENA, DNO & IDNO G81 design standards and engineering recommendations Assist in processing job specific cost estimates for variations and contract changes Record project progression on design database Work within guidance of the company More ❯