6 of 6 Remote/Hybrid VHDL Jobs in Midlothian

BEng, MEng, MSc, PhD, EngD) in Electrical & Electronic Engineering (preferable) or related science (e.g. Physics or Computer science). Ability to design RTL using VHDL is essential, knowledge of Verilog an advantage but not essential. Implementing high speed, multi-frequency clocking architectures Design with FPGA technologies from either AMD(Xilinx ...

similar engineering/science course.Ability to analyse system level requirements and capture/derive detailed FW requirements.Experience in firmware design techniques and tools, from VHDL to place-and-route.Experience in FPGA architectures such as system-on-chip (e.g. Xilinx Versal).Experience in specifying timing and area constraints for efficient FPGA ...

Depending on your experience, you ll bring some, or all, of the following:Experience in design techniques using VHDLExperience in verification techniques using either VHDL or System Verilog/UVM.Experience in specifying timing and area constraints for efficient FPGA place and route.Ability to analyse system level requirements and derive detailed ...

requirements and capture/derive detailed firmware requirements.Ability to prepare documentation for other engineers and design reviews.Experience in firmware design techniques and tools, from VHDL to place-and-route.Experience FPGA architectures such as system-on-chip (e.g. Xilinx Versal).Experience in specifying timing and area constraints for efficient FPGA place ...

capture/derive detailed firmware requirements. Ability to prepare documentation for other engineers and design reviews. Experience in firmware design techniques and tools, from VHDL to place-and-route. Experience FPGA architectures such as system-on-chip (e.g. Xilinx Versal). Experience in specifying timing and area constraints for efficient ...

expertise and a passion for innovation. Depending on your experience, you’ll bring some, or all, of the following: Experience in design techniques using VHDL Experience in verification techniques using either VHDL or System Verilog/UVM. Experience in specifying timing and area constraints for efficient FPGA place and route. ...