Design Verification Engineer
- Hiring Organisation
- IC Resources
- Location
- Norwich, Norfolk, UK
- Employment Type
- Full-time
Analyse simulation results, debug complex failures, and work closely with RTL design teams to root-cause and resolve issues. Develop and maintain Python and Perl scripts to improve verification flows and regression management. Requirements Strong SystemVerilog/UVM expertise (essential). Solid understanding of digital logic design and verification methodologies. … infrastructure Strong experience with micro-architecture, Verilog/SystemVerilog, synthesis, timing constraint development, lint, and CDC checks. Experience with scripting (Python and/or Perl). Eligibility & Package UK residency is required; relocation is not supported and only UK-based candidates can be considered. Visa sponsorship is available, where applicable. ...