Senior Staff Analog Mixed-Signal Design and Modelling Engineer
- Location
- Oxford, England, United Kingdom
level chip integration and modelling as a first‐class part of our Cryo‐CMOS development flow. In this you will build and maintain the model of the chip that the whole team simulates against, a mixed‐abstraction model combining transistor‐level circuits with Verilog‐A/Verilog … will decide which blocks are represented at which level of abstraction, keep the models faithful to the schematics and measured silicon. The full‐chip model will then be used to verify the ASICs that control the quantum processor from room temperature down to a few kelvin. You’ll play ...