IEC 62443, ISO 26262 Required Experience Experience of developing RTL design for digital electronics systems for Xilinx device architectures (or AMD/Lattice) using VHDL Experience in FPGA-SoC-implementation of algorithms developed in MATLAB/Simulink (algorithm development out of scope) Strong verification expertise in OSVVM/ More ❯
IEC 62443, ISO 26262 Required Experience Experience of developing RTL design for digital electronics systems for Xilinx device architectures (or AMD/Lattice) using VHDL Experience in FPGA-SoC-implementation of algorithms developed in MATLAB/Simulink (algorithm development out of scope) Strong verification expertise in OSVVM/ More ❯
IEC 62443, ISO 26262 Required Experience Experience of developing RTL design for digital electronics systems for Xilinx device architectures (or AMD/Lattice) using VHDL Experience in FPGA-SoC-implementation of algorithms developed in MATLAB/Simulink (algorithm development out of scope) Strong verification expertise in OSVVM/ More ❯
Edinburgh, Midlothian, Scotland, United Kingdom Hybrid / WFH Options
ZENOVO LTD
Profile: Strong background in FPGA/SoC development using VHDL, Verilog or SystemVerilog Experience with one or more major FPGA toolchains (Xilinx, Intel, Lattice, etc.) Confident designing testbenches and working with verification methodologies (e.g. UVM, OSVVM, UVVM) Hands-on use of simulation tools (ModelSim, QuestaSim, Vivado) Requirements-led More ❯
