8 of 8 Senior Design Engineer Jobs in the Thames Valley

impactful than ever before. Location: Oxford, England, UK. Hybrid, three days per week in the Oxford office. The Role: We are looking for a Senior QPU Design Engineer to join our Processor Design team at Oxford Ionics, now part of IonQ. You will be responsible … integrating all the features required to operate our quantum computers into complex chips, contributing to the team's mission of advancing the design of high performance quantum processing units. You will work closely with scientists and fabrication engineers to bring new designs for ion trapping chips into production ...

systems for aerospace, defence and industrial markets, both in UK and across the globe. Job Role We are seeking a highly experienced and motivated Senior Electronics Design Engineer to join our Control & Display Systems (CDS) team. You will lead electronic hardware development from requirements capture and concept … design through schematic design, PCB development, verification and production support. This is a hands-on technical role involving close collaboration with electronics, test, mechanical, manufacturing and sales teams, as well as customers, suppliers and subcontractors. You will also support technical estimating and the preparation of bills of materials ...

Based in Berkshire, Southern England, our leading Semiconductor client is recruiting for a Senior Analog IC Design Engineer. Excellent compensation packages on offer, plus visa sponsorship and relocation assistance. This is an exciting opportunity to work across analog and mixed-signal design, data converters, and power management … while taking ownership of the complete chip development cycle. As a Senior Analog IC Design Engineer, you will take designs from initial concept through silicon validation and production and have the chance to have real technical ownership. You will build your experience and the chance to influence ...

Recruitment Solutions Ltd is seeking a Senior FPGA Design Engineer to join our hardware development team in Oxford. You will design and verify FPGA code, push timing closure, and collaborate across electronics, mechanical and software disciplines to deliver high-performance products. The role covers full lifecycle ...

Resources is assisting a quantum computing client in Oxford to recruit a Senior Staff Analog Design Engineer with modelling experience. The role is based in Oxford with a hybrid working model and offers a highly attractive package. You will lead the complete design flow for analog ...

Haas F1 Team based in Banbury, UK, seeks an Electronics Engineer to design and integrate on‐car and off‐car harnesses, sensors and electronics. You will work with FIA and supplier requirements, support installation manuals, and drive fault investigation with the Reliability Engineer. Join a high‐performance team ...

performance from the racetrack and apply it to the world’s most challenging engineering problems. From cutting‐edge aerodynamics to high‐performance vehicle design, our expertise in Formula1 innovation drives breakthroughs across industries. Whether it’s revolutionizing mobility, advancing sustainability, or redefining speed, we bring world‐class engineering … forefront of technological excellence. Key Responsibilities Lead design and release of electrical systems and sub‐systems (e.g., wiring harnesses, sensors, control units, power distribution, communication networks). Gather and understand project requirements, create requirement and specification documents, and generate engineering reports. Define system architectures, interface requirements, and integration strategies ...

work a few days a week remotely. Travel: Up to 5% Job ID: 1765 Role: We are looking for a Staff Analog Mixed-Signal Design and Verification Engineer to join our Cryo-CMOS IC team at IonQ Oxford. In this role, you will design analog and mixed … signal blocks from specification through circuit design, simulation, layout, tape-out and silicon validation. You will also own top-level chip integration and modelling as a first-class part of our Cryo-CMOS development flow. In this you will build and maintain the model of the chip that ...