4 of 4 Remote/Hybrid ASIC Design Engineer Jobs in the UK excluding London

Digital ASIC Design Engineer seeking a challenging career move where you can contribute to the very latest imaging and augmented reality systems, designing and implementing FPGA based SoC systems? Hybrid working (up to 3 days per week from home) and very generous salary on offer. Applications welcome … from mid to senior level engineers. This award-winning Technology company seeks a Degree qualified Digital ASIC Design Engineer with SoC design and Integration skills, proven FPGA, VHDL & Verilog experience, RTL Verification experience and some Python knowledge. In this role the successful Digital ASIC Design ...

Technical Futures Ltd in Cambridge is seeking a Digital ASIC Design Engineer to design and implement FPGA-based SoC systems. Hybrid working (up to 3 days per week from home) and a very generous salary on offer. Applications welcome from mid to senior level engineers with … strong VHDL/Verilog, RTL verification and Python skills, plus experience in SoC design and integration. You will work closely with hardware, software and mechanical teams to bring new imaging/AR products to market. #J-18808-Ljbffr ...

advance your career. THE ROLE: Join a team at the forefront of computing innovation. This is an exceptional opportunity for a senior‐level engineer passionate about FPGA and ASIC development to work on advanced, high‐impact projects using world‐class infrastructure. As a senior member of the team … will play a pivotal role in the design, integration, and system‐level validation of cutting‐edge IPs and subsystems across both FPGA and ASIC platforms. Your work will support diverse and exciting markets ranging from wireless communications to aerospace and defense—technologies that are critical ...

VanRath is seeking an ASICS Engineer to contribute to cutting-edge analogue circuit design. The role offers a fully remote arrangement with a daily rate of £380 inside IR35, and flexible scheduling options. You will work on multiple analogue blocks, including LDOs and temperature sensors, within a world-class … semiconductor environment. Strong expertise in schematic design, simulation, and post-layout calibration is required for success. #J-18808-Ljbffr ...