1 to 25 of 33 SystemVerilog Jobs with Hybrid or WFH Options

that are Degree qualified (or equivalent) with significant experience in FPGA development. Competent VHDL Language and Design Skills. Competent Verification Skills using VHDL and SystemVerilog methodologies A deep proven level of experience designing for Xilinx, Intel or Microsemi FPGAs Experience of professionally configuring and documenting designs SC required before starting more »

that are Degree qualified (or equivalent) with significant experience in FPGA development. Competent VHDL Language and Design Skills. Competent Verification Skills using VHDL and SystemVerilog methodologies A deep proven level of experience designing for Xilinx, Intel or Microsemi FPGAs Experience of professionally configuring and documenting designs SC required before starting more »

Analog Design Engineer (CPU) Cambridge to £120k Do you have expertise with Analog design, blocks and circuits? You could be progressing your career in a senior, hands-on role at a very well funded tech start-up that is set more »

of own work YOU SHOULD HAVE: Over 5 years recent and relevant module design experience within at least one HDL (VHDL/Verilog/SystemVerilog) Knowledge of computer systems and architecture Ability to write clear and concise code Experience with digital circuit simulation User knowledge of Linux Knowledge of versioning more »

Role – Senior Hardware Engineer Salary- £55,000 - £65,000 per annum (dependent on experience) Location – Kent – Hybrid An industry leading group based in Kent are looking to grow their highly skilled, innovative, and enthusiastic engineering team with the addition of more »

within the UK and unable to relocate. You would join a team working on AI/ML/Data Analytics acceleration. Key skills Strong SystemVerilog skills. Strong micro-architecture skills; ability to take ML/AI/Data Analytics concepts and come up with micro-architecture specifications to accelerate these more »

effective testing. Key skills CPU/GPU/Accelerator/AI experience welcomed. Strong knowledge and hands on experience with Verification methodologies. Experience in SystemVerilog, C or PythonAll levels welcome and encouraged. If you are a Junior Engineer looking for the next step in your career working on cutting edge more »

Analog Design Engineer (CPU) Cambridge to £120k Do you have expertise with Analog design, blocks and circuits? You could be progressing your career in a senior, hands-on role at a very well funded tech start-up that is set more »

team members, in collaboration with our international team(s) The ideal candidates for this position will have: Delivered with (as applicable) SoC design verification, SystemVerilog languages (UVM, SVA, SFC), low power verification (UPF methodology), software/hardware co-verification (SystemC/C/C++), Interfaced with designs/teams with more »

This is a new opportunity for an Analog IC Design Lead Engineer to join a solid and growing Semiconductor company based in Edinburgh working on low-power, high-performance Analog/Mixed Signal IC Designs in advanced CMOS processes for more »

understand and review the architecture and design specifications, and to build a functional verification strategy. Your key responsibilities will include crafting test plans, developing SystemVerilog/Verilog testbenches and tests, and debugging of test failures and issues. You will also contribute to developing and improving the verification methodologies used by … Perl, Python or other scripting language Nice to have skills & experience: Experience with Arm-based designs and/or ARM System Architectures Experience with SystemVerilog and verification methodologies - UVM/OVM/e Knowledge of Object-Oriented programming concepts. Experience or knowledge in the following areas Formal verification techniques Clock more »

and review the subsystem architecture and design specifications, and to build a functional verification strategy. Your key responsibilities will include crafting test plans, developing SystemVerilog/Verilog testbenches and tests, and debugging of test failures and issues. You will also contribute to developing and improving the verification methodologies used by … Python or other scripting language Nice to have skills and experience: Experience with Arm-based designs and/or ARM System Architectures Experience with SystemVerilog and verification methodologies - UVM/OVM/e Knowledge of Object-Oriented programming concepts. Experience or knowledge in the following areas Formal verification techniques Clock more »

driver development Comprehensive understanding of clock domain crossing techniques Strong knowledge of FPGA tool flows (synthesis, partitioning, place&route, timing analysis) Excellent skills in SystemVerilog/Verilog/VHDL Experience in scripting (tcl preferable) and Python programming Experience using Questa, ModelSim, GHDL, Verilator, cocotb Experience using Quartus/Vivado/ more »

Verification Engineer A fantastic opportunity for a passionate Verification Engineer to join an international Deep-Tech Semiconductor Company, where you will contribute to the verification of a game-changing hardware and software platform for AI at the edge. You will more »

Role – Senior Hardware Engineer Salary- £55,000 - £65,000 per annum (dependent on experience) Location – Kent – Hybrid An industry leading group based in Kent are looking to grow their highly skilled, innovative, and enthusiastic engineering team with the addition of more »

ASIC Verification Engineer – Working on bleeding process nodes and at huge volume with Silicon Valley! Location: Oxfordshire (Hybrid Model) This is an interesting opportunity for an ASIC Verification Engineer to join a leading provider of high-performance client data centre more »

gadgets on the market today and in the future. The ideal candidate will have: Proven experience of digital ASIC verification techniques Strong experience in SystemVerilog or Verilog testbench creation Experience with OVM, VMM, UVM methodologies Effective problem solving, communication and team working skills (essential!)This position offers the opportunity to more »

ASIC Verification Engineer - Working on bleeding process nodes and at huge volume with Silicon Valley! Location: Oxfordshire (Hybrid Model) This is an interesting opportunity for an ASIC Verification Engineer to join a leading provider of high-performance client data centre more »

This is a new opportunity for an Analog/Mixed Signal Lead Design Engineer to join a solid and growing Semiconductor company based in Edinburgh working on low-power, high-performance Analog/Mixed Signal IC Designs in advanced CMOS more »

FPGA Engineer Location: Cambridge, Hybrid Working We are excited to be supporting an established SME working on Radar Systems for a variety of security and surveillance activities. They are currently looking to add an FPGA Engineer to their design team more »

members of the Verification team. Requirement: A BSc/MSc degree in Computer Engineering or similar Proven experience in Hardware Verification, with expertise within SystemVerilog/UVM A keen interest to work on RISC-V projects Experience working on CPU/GPU Verification Eligibility to work in the USApply now more »

Are you excited about R&D? An R&D Centre in Munich is looking for an experienced AMS Verification Engineer to work full time in their office (no hybrid working!). International candidates with strong skills in System C, System more »

to enhancing Verification strategy and architecture of IP testbenches.Key Skills At least 8 years of experience in Verification working with Verilog and/or SystemVerilog; 5 years of experience on IP/block level Test-bench bring up on SV UVM based platform; The ability to understand complex design specification more »

to enhancing Verification strategy and architecture of IP testbenches.Key Skills At least 8 years of experience in Verification working with Verilog and/or SystemVerilog; 5 years of experience on IP/block level Test-bench bring up on SV UVM based platform; The ability to understand complex design specification more »

Full and deep understanding of the CPU architectures is an advantage; Expertise in hardware verification languages such as SV UVM, UVM and SVAs, and SystemVerilog; Knowledge of verification platform and framework development, RTL and Gate level (optional) functional verification; Proven experience of IP/Sub-System/SoC verification including more »