26 to 50 of 226 Field-Programmable-Gate-Array Jobs

Graduate FPGA Engineer A brilliant opportunity to join an innovative team building high-integrity, security-critical FPGA solutions. Whether youre a recent graduate building foundations or a seasoned engineer leading architecture and verification, youll work across cutting-edge designs used in complex, mission-critical products (with exposure to applied cryptography … wider microelectronics). Location: Derby (UK travel between sites may be required) Salary: £30,000£75,000 DOE + benefits Requirements for FPGA Engineer: Degree in a relevant STEM field (e.g. Electronics, Electrical, Computer or Communications Engineering). Strong FPGA design fundamentals and VHDL skills; ability to write ...

000.00-£85,000.00 per year Job description: Overview We are seeking a highly skilled FPGA Engineer to join our innovative engineering team. The successful candidate will be responsible for designing, developing. Are you a meticulous FPGA Engineer with a passion for precision and excellence? Are you ready to play … pivotal role in ensuring top-tier standards in a well-established engineering organization? Look no further! Duties/Key Skills: FPGA, VHDL, MATLAB/Simulink, Electronic Engineering, Electrical Engineering, Defence. The Role: So, what will you be doing as a FPGA Design Engineer? Developing complex FPGA architectures and design implementations ...

Stevenage Are you an experienced FPGA Designer who enjoys contributing to the development of complex FPGA platforms? Look no further! Join our ambitious team at MBDA and be part of a company that is at the forefront of innovation. Apply now and take the next step in your career … FPGA Designer. Job Title : FPGA Designer Salary : Up to circa £75,000 depending on experience Locations : Stevenage, Bristol and Bolton (we may be able to offer a relocation package for this role) Dynamic (hybrid) working : 4-5 days per week on-site, due to workload classification. This could be less ...

Bristol Are you an experienced FPGA Designer who enjoys contributing to the development of complex FPGA platforms? Look no further! Join our ambitious team at MBDA and be part of a company that is at the forefront of innovation. Apply now and take the next step in your career … FPGA Designer. Job Title : FPGA Designer Salary : Up to circa £75,000 depending on experience Locations : Stevenage, Bristol and Bolton (we may be able to offer a relocation package for this role) Dynamic (hybrid) working : 4-5 days per week on-site, due to workload classification. This could be less ...

Stevenage Are you an experienced FPGA Designer who enjoys contributing to the development of complex FPGA platforms? Look no further! Join our ambitious team at MBDA and be part of a company that is at the forefront of innovation. Apply now and take the next step in your career … FPGA Designer. Job Title : FPGA Designer Salary : Up to circa £75,000 depending on experience Locations : Stevenage, Bristol and Bolton (we may be able to offer a relocation package for this role) Dynamic (hybrid) working : 4-5 days per week on-site, due to workload classification. This could be less ...

equipment (spectrum analysers, VNAs, signal generators) Experience in passive radar, beamforming, TDoA, Doppler, or direction finding Familiarity with embedded or real-time systems (FPGA pipelines, GPU acceleration, etc.) Programming experience in MATLAB, C++, Rust, or similar languages Knowledge of RF circuit principles (impedance matching, filter design, gain budgeting) Experience designing ...

equipment (spectrum analysers, VNAs, signal generators) Experience in passive radar, beamforming, TDoA, Doppler, or direction finding Familiarity with embedded or real-time systems (FPGA pipelines, GPU acceleration, etc.) Programming experience in MATLAB, C++, Rust, or similar languages Knowledge of RF circuit principles (impedance matching, filter design, gain budgeting) Experience designing ...

chip lead/or SOC architect Digital/AMS, analog-mixed-signal IP End to end chip/SOC delivery experience ASIC & FPGA - verilog, system verilog, VHDL ADC/DAC - digital - analog interfaces Functional verification - system verilog - IP, system, sub-system, block, top level experience Creation of test-benches detailed ...

performance efficiency Design security-hardened digital circuits with awareness of side channel vulnerabilities and appropriate countermeasures Deliver production ready designs targeting both ASIC and FPGA platforms Own the design lifecycle: specification, micro-architecture, coding (Verilog/VHDL), synthesis, timing closure, and verification Support design activities through scripting and automation (Python ...

performance efficiency Design security-hardened digital circuits with awareness of side channel vulnerabilities and appropriate countermeasures Deliver production ready designs targeting both ASIC and FPGA platforms Own the design lifecycle: specification, micro-architecture, coding (Verilog/VHDL), synthesis, timing closure, and verification Support design activities through scripting and automation (Python ...

performance efficiency Design security-hardened digital circuits with awareness of side channel vulnerabilities and appropriate countermeasures Deliver production ready designs targeting both ASIC and FPGA platforms Own the design lifecycle: specification, micro-architecture, coding (Verilog/VHDL), synthesis, timing closure, and verification Support design activities through scripting and automation (Python ...

performance efficiency Design security-hardened digital circuits with awareness of side channel vulnerabilities and appropriate countermeasures Deliver production ready designs targeting both ASIC and FPGA platforms Own the design lifecycle: specification, micro-architecture, coding (Verilog/VHDL), synthesis, timing closure, and verification Support design activities through scripting and automation (Python ...

performance efficiency Design security-hardened digital circuits with awareness of side channel vulnerabilities and appropriate countermeasures Deliver production ready designs targeting both ASIC and FPGA platforms Own the design lifecycle: specification, micro-architecture, coding (Verilog/VHDL), synthesis, timing closure, and verification Support design activities through scripting and automation (Python ...

performance efficiency Design security-hardened digital circuits with awareness of side channel vulnerabilities and appropriate countermeasures Deliver production ready designs targeting both ASIC and FPGA platforms Own the design lifecycle: specification, micro-architecture, coding (Verilog/VHDL), synthesis, timing closure, and verification Support design activities through scripting and automation (Python ...

performance efficiency Design security-hardened digital circuits with awareness of side channel vulnerabilities and appropriate countermeasures Deliver production ready designs targeting both ASIC and FPGA platforms Own the design lifecycle: specification, micro-architecture, coding (Verilog/VHDL), synthesis, timing closure, and verification Support design activities through scripting and automation (Python ...

performance efficiency Design security-hardened digital circuits with awareness of side channel vulnerabilities and appropriate countermeasures Deliver production ready designs targeting both ASIC and FPGA platforms Own the design lifecycle: specification, micro-architecture, coding (Verilog/VHDL), synthesis, timing closure, and verification Support design activities through scripting and automation (Python ...

performance efficiency Design security-hardened digital circuits with awareness of side channel vulnerabilities and appropriate countermeasures Deliver production ready designs targeting both ASIC and FPGA platforms Own the design lifecycle: specification, micro-architecture, coding (Verilog/VHDL), synthesis, timing closure, and verification Support design activities through scripting and automation (Python ...

performance efficiency Design security-hardened digital circuits with awareness of side channel vulnerabilities and appropriate countermeasures Deliver production ready designs targeting both ASIC and FPGA platforms Own the design lifecycle: specification, micro-architecture, coding (Verilog/VHDL), synthesis, timing closure, and verification Support design activities through scripting and automation (Python ...

performance efficiency Design security-hardened digital circuits with awareness of side channel vulnerabilities and appropriate countermeasures Deliver production ready designs targeting both ASIC and FPGA platforms Own the design lifecycle: specification, micro-architecture, coding (Verilog/VHDL), synthesis, timing closure, and verification Support design activities through scripting and automation (Python ...

performance efficiency Design security-hardened digital circuits with awareness of side channel vulnerabilities and appropriate countermeasures Deliver production ready designs targeting both ASIC and FPGA platforms Own the design lifecycle: specification, micro-architecture, coding (Verilog/VHDL), synthesis, timing closure, and verification Support design activities through scripting and automation (Python ...

performance efficiency Design security-hardened digital circuits with awareness of side channel vulnerabilities and appropriate countermeasures Deliver production ready designs targeting both ASIC and FPGA platforms Own the design lifecycle: specification, micro-architecture, coding (Verilog/VHDL), synthesis, timing closure, and verification Support design activities through scripting and automation (Python ...

performance efficiency Design security-hardened digital circuits with awareness of side channel vulnerabilities and appropriate countermeasures Deliver production ready designs targeting both ASIC and FPGA platforms Own the design lifecycle: specification, micro-architecture, coding (Verilog/VHDL), synthesis, timing closure, and verification Support design activities through scripting and automation (Python ...

performance efficiency Design security-hardened digital circuits with awareness of side channel vulnerabilities and appropriate countermeasures Deliver production ready designs targeting both ASIC and FPGA platforms Own the design lifecycle: specification, micro-architecture, coding (Verilog/VHDL), synthesis, timing closure, and verification Support design activities through scripting and automation (Python ...

performance efficiency Design security-hardened digital circuits with awareness of side channel vulnerabilities and appropriate countermeasures Deliver production ready designs targeting both ASIC and FPGA platforms Own the design lifecycle: specification, micro-architecture, coding (Verilog/VHDL), synthesis, timing closure, and verification Support design activities through scripting and automation (Python ...

performance efficiency Design security-hardened digital circuits with awareness of side channel vulnerabilities and appropriate countermeasures Deliver production ready designs targeting both ASIC and FPGA platforms Own the design lifecycle: specification, micro-architecture, coding (Verilog/VHDL), synthesis, timing closure, and verification Support design activities through scripting and automation (Python ...