26 to 50 of 280 Field-Programmable-Gate-Array Jobs

development. Collaborate with cross-functional teams including physicists and engineers to ensure seamless integration of hardware and software components for robust product software systems. Technical Expectations Strong understanding of FPGA architectures, toolchains (e.g., Xilinx Vivado, Intel Quartus), and hardware description languages (VHDL/Verilog). Experience with high-speed data centre and GPU interfaces (e.g., PCIe, Ethernet, Infiniband, Tofu). More ❯

development. Collaborate with cross-functional teams including physicists and engineers to ensure seamless integration of hardware and software components for robust product software systems. Technical Expectations Strong understanding of FPGA architectures, toolchains (e.g., Xilinx Vivado, Intel Quartus), and hardware description languages (VHDL/Verilog). Experience with high-speed data centre and GPU interfaces (e.g., PCIe, Ethernet, Infiniband, Tofu). More ❯

development. Collaborate with cross-functional teams including physicists and engineers to ensure seamless integration of hardware and software components for robust product software systems. Technical Expectations Strong understanding of FPGA architectures, toolchains (e.g., Xilinx Vivado, Intel Quartus), and hardware description languages (VHDL/Verilog). Experience with high-speed data centre and GPU interfaces (e.g., PCIe, Ethernet, Infiniband, Tofu). More ❯

development. Collaborate with cross-functional teams including physicists and engineers to ensure seamless integration of hardware and software components for robust product software systems. Technical Expectations Strong understanding of FPGA architectures, toolchains (e.g., Xilinx Vivado, Intel Quartus), and hardware description languages (VHDL/Verilog). Experience with high-speed data centre and GPU interfaces (e.g., PCIe, Ethernet, Infiniband, Tofu). More ❯

dedicated to providing cutting-edge network monitoring solutions. About the Role Reporting to the R&D Project Manager, candidates will be responsible for the architecture, design and verification of FPGA sub-systems within our client's flagship network monitoring products. The role is multi-disciplinary and includes development of FPGA IP Cores, full FPGA System-on-Chip RTL designs and … verification testbenches. Responsibilities Architecture, design and verification of FPGA sub-systems. Development of FPGA IP Cores. Full FPGA System-on-Chip RTL designs. Verification testbenches. Mentoring of less experienced colleagues (for senior roles). Beneficial Skills to have Experience of designing FPGA IP cores or sub-systems. Designing FPGA architectures from a technical specification. Design with AMD/Intel FPGA … and CPLD devices. Using VHDL/Verilog HDL languages for FPGA design. Implementing high speed, multi-frequency clocking architectures. Designing (code entry to timing analysis) using Intel and/or Xilinx FPGA tool sets. Designing for high-speed optical interfaces. Designing for high-speed SERDES interfaces (up to 28G/56G). More ❯

dedicated to providing cutting-edge network monitoring solutions. About the Role Reporting to the R&D Project Manager, candidates will be responsible for the architecture, design and verification of FPGA sub-systems within our client's flagship network monitoring products. The role is multi-disciplinary and includes development of FPGA IP Cores, full FPGA System-on-Chip RTL designs and … verification testbenches. Responsibilities Architecture, design and verification of FPGA sub-systems. Development of FPGA IP Cores. Full FPGA System-on-Chip RTL designs. Verification testbenches. Mentoring of less experienced colleagues (for senior roles). Beneficial Skills to have Experience of designing FPGA IP cores or sub-systems. Designing FPGA architectures from a technical specification. Design with AMD/Intel FPGA … and CPLD devices. Using VHDL/Verilog HDL languages for FPGA design. Implementing high speed, multi-frequency clocking architectures. Designing (code entry to timing analysis) using Intel and/or Xilinx FPGA tool sets. Designing for high-speed optical interfaces. Designing for high-speed SERDES interfaces (up to 28G/56G). More ❯

dedicated to providing cutting-edge network monitoring solutions. About the Role Reporting to the R&D Project Manager, candidates will be responsible for the architecture, design and verification of FPGA sub-systems within our client's flagship network monitoring products. The role is multi-disciplinary and includes development of FPGA IP Cores, full FPGA System-on-Chip RTL designs and … verification testbenches. Responsibilities Architecture, design and verification of FPGA sub-systems. Development of FPGA IP Cores. Full FPGA System-on-Chip RTL designs. Verification testbenches. Mentoring of less experienced colleagues (for senior roles). Beneficial Skills to have Experience of designing FPGA IP cores or sub-systems. Designing FPGA architectures from a technical specification. Design with AMD/Intel FPGA … and CPLD devices. Using VHDL/Verilog HDL languages for FPGA design. Implementing high speed, multi-frequency clocking architectures. Designing (code entry to timing analysis) using Intel and/or Xilinx FPGA tool sets. Designing for high-speed optical interfaces. Designing for high-speed SERDES interfaces (up to 28G/56G). More ❯

dedicated to providing cutting-edge network monitoring solutions. About the Role Reporting to the R&D Project Manager, candidates will be responsible for the architecture, design and verification of FPGA sub-systems within our client's flagship network monitoring products. The role is multi-disciplinary and includes development of FPGA IP Cores, full FPGA System-on-Chip RTL designs and … verification testbenches. Responsibilities Architecture, design and verification of FPGA sub-systems. Development of FPGA IP Cores. Full FPGA System-on-Chip RTL designs. Verification testbenches. Mentoring of less experienced colleagues (for senior roles). Beneficial Skills to have Experience of designing FPGA IP cores or sub-systems. Designing FPGA architectures from a technical specification. Design with AMD/Intel FPGA … and CPLD devices. Using VHDL/Verilog HDL languages for FPGA design. Implementing high speed, multi-frequency clocking architectures. Designing (code entry to timing analysis) using Intel and/or Xilinx FPGA tool sets. Designing for high-speed optical interfaces. Designing for high-speed SERDES interfaces (up to 28G/56G). More ❯

in this Graduate Software Engineer job, please apply. For more information on this role, or any other jobs across; Embedded, C++ programming, Embedded Linux, Javascript, typescript, PCB, Hardware, Electronics, FPGA, Python, Golang Development, Machine Learning, Data Science or Simulation contact us today. More ❯

in this Graduate Software Engineer job, please apply. For more information on this role, or any other jobs across; Embedded, C++ programming, Embedded Linux, Javascript, typescript, PCB, Hardware, Electronics, FPGA, Python, Golang Development, Machine Learning, Data Science or Simulation contact us today. More ❯

academic background typically including A*'s in A-level Maths and Physics have strong verbal and written presentation skills have knowledge of at least one of the following areas: FPGA development in VHDL PCB design and layout software development in embedded C/C++. The candidate will be responsible for: simulating and implementing signal, image, or data processing algorithms in More ❯

of power-efficient digital design techniques . Experience in custom hardware development for DSP applications . Familiarity with fixed-point and floating-point arithmetic implementations. Experience with ASIC or FPGA design flows , including synthesis and timing closure. Understanding of communication systems and protocols is a strong advantage. Competency in scripting languages such as Python, Perl , or Tcl for automation is More ❯

at A-level (or equivalent). Ideally, you will also have an advanced degree or PhD in a relevant subject Previous commercial experience in areas such as PCB layout, FPGA and SoC design, VHDL, embedded C or C++ development, high speed networking, or RF filtering Excellent client-facing communication skills Ability to obtain a higher level UK security clearance - i.e. More ❯

industry-leading SoC development team tackling complex design challenges including high-speed interfaces, high-performance accelerators, and multi-CPU architectures. Team responsibilities span SoC architecture, RTL design, verification, synthesis, FPGA prototyping, and validation. Why Oxfordshire? Oxfordshire offers a fantastic quality of life, combining a world-renowned university city with beautiful countryside. With excellent schools, cultural attractions, and easy access to More ❯

industry-leading SoC development team tackling complex design challenges including high-speed interfaces, high-performance accelerators, and multi-CPU architectures. Team responsibilities span SoC architecture, RTL design, verification, synthesis, FPGA prototyping, and validation. Why Oxfordshire? Oxfordshire offers a fantastic quality of life, combining a world-renowned university city with beautiful countryside. With excellent schools, cultural attractions, and easy access to More ❯

of a 1st or 2.1 Degree (PhD being highly beneficial) and with good A levels including Mathematics and Physics; you will ideally have commercial experience involving complex PCB design, FPGA development in VHDL and Embedded C/C++. Knowledge of Signal Processing, IC Design & Verification, Analogue design and Digital design are also highly beneficial. This Technology Consultancy provides software and More ❯

We are looking for a C++ developer to be part of the low latency development team. The team provides industry leading low-latency trading services for our clients, utilizing FPGA, C++ and Java technologies. The candidate will be focusing on the C++ components. The ideal candidate: Is motivated by working in a high performing team, Is flexible to change of More ❯

debugging. Communicates well and works well with others. Nice to Have: Experience working in regulated or safety-critical environments (e.g., DO-178C, ISO 26262, IEC 61508). Knowledge of FPGA or other low-level hardware programming. Experience with CI/CD pipelines and automated build/test tools. More ❯

debugging. Communicates well and works well with others. Nice to Have: Experience working in regulated or safety-critical environments (e.g., DO-178C, ISO 26262, IEC 61508). Knowledge of FPGA or other low-level hardware programming. Experience with CI/CD pipelines and automated build/test tools. More ❯

their field. As part of a large team of analogue and digital electronics design engineers, you will be responsible for the electronics design and development of high speed MPSoC FPGA and AI hardware solutions targeting SDR, radar signal processing and sensor fusion applications. As Hardware Lead, you will support the Technical Lead/Architect in collaboration with the systems, software More ❯

their field. As part of a large team of analogue and digital electronics design engineers, you will be responsible for the electronics design and development of high speed MPSoC FPGA and AI hardware solutions targeting SDR, radar signal processing and sensor fusion applications. As Hardware Lead, you will support the Technical Lead/Architect in collaboration with the systems, software More ❯

development tools (e.g. STM32) and environments (e.g., debuggers, emulators, compilers, KiCad). Knowledge of hardware-software integration and experience with 16/32-bit microcontrollers, microprocessors, Lora Modules and FPGA-based systems. Familiarity with communication protocols (e.g., CAN, UART, SPI, I2C). Understanding of software development lifecycle and methodologies (e.g. Agile, V-Model methods). Experience with version control systems More ❯

Job Title: FPGA/Digital Design Engineer Location: Reading area (hybrid/remote working permitted) Employment Type: Permanent, full-time Visa sponsorship: Not available (UK rights to work required) Client Snapshot We are working with a cutting-edge technology company based near Reading, specialising in Software-Defined Radio (SDR) solutions for the Space/Satellite industry. The team develops advanced … You will join a fast-paced, technically ambitious environment, collaborating closely with RF, software, hardware, and systems engineers to deliver flight-capable digital designs. What Youll Do As an FPGA/Digital Design Engineer, you will: Architect, design, implement, verify, and integrate digital logic (RTL) for FPGA/SoC platforms Work on signal processing, communications, data pipelines, digital beamforming, or … Engineering (or equivalent) Strong experience in digital design with VHDL and/or Verilog/SystemVerilog Proven track record performing synthesis, timing closure, and static timing analysis Experience with FPGA tool flows (e.g. Xilinx Vivado, Intel/Altera tools, or similar) Familiarity with simulation/verification tools (ModelSim, Questa, VCS, etc.) Experience working with high-speed interfaces (e.g. multi-gigabit More ❯

chip design and delivery/as a chip lead/or SOC architect Digital/AMS, analog-mixed-signal IP End to end chip/SOC delivery experience ASIC & FPGA - verilog, system verilog, VHDL ADC/DAC - digital - analog interfaces Functional verification - system verilog - IP, system, sub-system, block, top level experience Creation of test-benches detailed knowledge of complex More ❯

oscilloscopes and logic analysers Familiarity with version control systems (e.g., Git) and Agile development practices Desirable: Experience with safety-critical or high-integrity systems (e.g., aerospace, automotive) Exposure to FPGA development or low-level hardware programming Understanding of CI/CD pipelines and automated testing ?? Benefits & Perks 25 days annual leave + 8 bank holidays Christmas shutdown 5% company pension More ❯