1 to 25 of 65 JTAG Jobs

Electronic Design Engineer / Leader

Dalmally, Argyll, United Kingdom
Affinity Executive Search
experience. PWB layout knowledge. Standards understanding including MIL and DO. Familiar with multiple communication protocols (CAN, PCIe, RS232/422/485, Ethernet, SPI, JTAG, etc.). You should be very promotable with a desire to stay technical. Why is This a Great Opportunity: Great growth opportunity with well-established more »
Salary: £ 100 K
Posted:

Senior DFT Engineer

Southampton, Hampshire, United Kingdom
Hybrid / WFH Options
IC Resources
across several successful ASIC projects.DFT experience including architecture specification, implementation, test pattern development and verification.Knowledge about industrial standards and practices in DFT, including ATPG, JTAG, and MBIST.An understanding or RTL design and verification is a plus. Experience working on SoC projects is beneficial. If you are keen to find out more »
Salary: £ 80 K
Posted:

Senior Hardware Design Engineer

Towcester, Northamptonshire, East Midlands, United Kingdom
Hybrid / WFH Options
Enterprise Control Systems Limited
or airborne applications. o Experience of designing for and test/verification MIL-STDs and DO160. o Test and verification using tools such as JTAG Boundary Scan Testing o Experience of test equipment such as oscilloscopes, analysers and signal generators. Education & Certifications Required is a Bachelors degree in Electronics or more »
Employment Type: Permanent, Work From Home
Posted:

Staff/Principal DFT Engineer

Austin, Texas, United States
ARM
include some of the following: Siemens DFT tools, Streaming Scan Network (SSN), Scan compression and insertion, Memory BIST and repair scheme implementation, Logic BIST, JTAG/IJTAG, at-speed test, ATPG, fault simulation, back-annotated gate level verification, silicon debug, memory and scan diagnostics. Experience coding Verilog RTL, TCL and more »
Employment Type: Permanent
Salary: USD Annual
Posted:

Principal DFT Engineer/DFT Timing Lead

Austin, Texas, United States
ARM
of the following: experience in Siemens DFT tool, Streaming Scan Network (SSN), Scan compression and insertion, Memory BIST and repair scheme implementation, Logic BIST, JTAG/IJTAG, at-speed test, ATPG, fault simulation, back-annotated gate level verification, silicon debug, memory and scan diagnostics. Experience coding Verilog RTL, TCL and more »
Employment Type: Permanent
Salary: USD Annual
Posted:

FPGA DSP Firmware Design Engineer

Saint Petersburg, Florida, United States
Leidos
/UVM • Experience with generating scripts (Perl, Tcl, Python, etc.) • Working knowledge of C/C++ • Experience with interfaces: ADC/DACs, SerDes, PCIe, JTAG, DDRx • Existing Secret (or above) Clearance LInC Electronic Warfare Original Posting Date: 2024-04-25 While subject to change based on business needs, Leidos reasonably more »
Employment Type: Permanent
Salary: USD Annual
Posted:

FPGA DSP Firmware Design Engineer

Chula Vista, California, United States
Leidos
/UVM • Experience with generating scripts (Perl, Tcl, Python, etc.) • Working knowledge of C/C++ • Experience with interfaces: ADC/DACs, SerDes, PCIe, JTAG, DDRx • Existing Secret (or above) Clearance LInC Electronic Warfare Original Posting Date: 2024-04-29 While subject to change based on business needs, Leidos reasonably more »
Employment Type: Permanent
Salary: USD Annual
Posted:

FPGA DSP Firmware Design Engineer

La Jolla, California, United States
Leidos
/UVM • Experience with generating scripts (Perl, Tcl, Python, etc.) • Working knowledge of C/C++ • Experience with interfaces: ADC/DACs, SerDes, PCIe, JTAG, DDRx • Existing Secret (or above) Clearance LInC Electronic Warfare Original Posting Date: 2024-04-29 While subject to change based on business needs, Leidos reasonably more »
Employment Type: Permanent
Salary: USD Annual
Posted:

FPGA DSP Firmware Design Engineer

San Diego, California, United States
Leidos
/UVM • Experience with generating scripts (Perl, Tcl, Python, etc.) • Working knowledge of C/C++ • Experience with interfaces: ADC/DACs, SerDes, PCIe, JTAG, DDRx • Existing Secret (or above) Clearance LInC Electronic Warfare Original Posting Date: 2024-04-29 While subject to change based on business needs, Leidos reasonably more »
Employment Type: Permanent
Salary: USD Annual
Posted:

FPGA DSP Firmware Design Engineer

National City, California, United States
Leidos
/UVM • Experience with generating scripts (Perl, Tcl, Python, etc.) • Working knowledge of C/C++ • Experience with interfaces: ADC/DACs, SerDes, PCIe, JTAG, DDRx • Existing Secret (or above) Clearance LInC Electronic Warfare Original Posting Date: 2024-04-29 While subject to change based on business needs, Leidos reasonably more »
Employment Type: Permanent
Salary: USD Annual
Posted:

FPGA DSP Firmware Design Engineer

El Cajon, California, United States
Leidos
/UVM • Experience with generating scripts (Perl, Tcl, Python, etc.) • Working knowledge of C/C++ • Experience with interfaces: ADC/DACs, SerDes, PCIe, JTAG, DDRx • Existing Secret (or above) Clearance LInC Electronic Warfare Original Posting Date: 2024-04-29 While subject to change based on business needs, Leidos reasonably more »
Employment Type: Permanent
Salary: USD Annual
Posted:

FPGA DSP Firmware Design Engineer

Rancho Santa Fe, California, United States
Leidos
/UVM • Experience with generating scripts (Perl, Tcl, Python, etc.) • Working knowledge of C/C++ • Experience with interfaces: ADC/DACs, SerDes, PCIe, JTAG, DDRx • Existing Secret (or above) Clearance LInC Electronic Warfare Original Posting Date: 2024-04-29 While subject to change based on business needs, Leidos reasonably more »
Employment Type: Permanent
Salary: USD Annual
Posted:

Senior Microelectronics Hardware Design Engineer

La Jolla, California, United States
Leidos
in leading a design team • Experience in hardware test and measurement and hands-on lab debug • Experience with interfaces: ADC/DACs, SerDes, PCIe, JTAG, DDRx LInC Electronic Warfare Original Posting Date: 2024-04-04 While subject to change based on business needs, Leidos reasonably anticipates that this job requisition more »
Employment Type: Permanent
Salary: USD Annual
Posted:

Senior Microelectronics Hardware Design Engineer

National City, California, United States
Leidos
in leading a design team • Experience in hardware test and measurement and hands-on lab debug • Experience with interfaces: ADC/DACs, SerDes, PCIe, JTAG, DDRx LInC Electronic Warfare Original Posting Date: 2024-04-04 While subject to change based on business needs, Leidos reasonably anticipates that this job requisition more »
Employment Type: Permanent
Salary: USD Annual
Posted:

Senior Microelectronics Hardware Design Engineer

San Diego, California, United States
Leidos
in leading a design team • Experience in hardware test and measurement and hands-on lab debug • Experience with interfaces: ADC/DACs, SerDes, PCIe, JTAG, DDRx LInC Electronic Warfare Original Posting Date: 2024-04-04 While subject to change based on business needs, Leidos reasonably anticipates that this job requisition more »
Employment Type: Permanent
Salary: USD Annual
Posted:

Senior Microelectronics Hardware Design Engineer

El Cajon, California, United States
Leidos
in leading a design team • Experience in hardware test and measurement and hands-on lab debug • Experience with interfaces: ADC/DACs, SerDes, PCIe, JTAG, DDRx LInC Electronic Warfare Original Posting Date: 2024-04-04 While subject to change based on business needs, Leidos reasonably anticipates that this job requisition more »
Employment Type: Permanent
Salary: USD Annual
Posted:

Senior Microelectronics Hardware Design Engineer

Chula Vista, California, United States
Leidos
in leading a design team • Experience in hardware test and measurement and hands-on lab debug • Experience with interfaces: ADC/DACs, SerDes, PCIe, JTAG, DDRx LInC Electronic Warfare Original Posting Date: 2024-04-04 While subject to change based on business needs, Leidos reasonably anticipates that this job requisition more »
Employment Type: Permanent
Salary: USD Annual
Posted:

Senior Microelectronics Hardware Design Engineer

Cardiff By The Sea, California, United States
Leidos
in leading a design team • Experience in hardware test and measurement and hands-on lab debug • Experience with interfaces: ADC/DACs, SerDes, PCIe, JTAG, DDRx LInC Electronic Warfare Original Posting Date: 2024-04-04 While subject to change based on business needs, Leidos reasonably anticipates that this job requisition more »
Employment Type: Permanent
Salary: USD Annual
Posted:

Microelectronics Design Engineer

Saint Petersburg, Florida, United States
Leidos
in leading a design team Experience in hardware test and measurement and hands-on lab debug Experience with interfaces: ADC/DACs, SerDes, PCIe, JTAG, DDRx LInC Electronic Warfare Original Posting Date: 2024-04-25 While subject to change based on business needs, Leidos reasonably anticipates that this job requisition more »
Employment Type: Permanent
Salary: USD Annual
Posted:

Microelectronics ASIC Design Engineer

Arlington, Virginia, United States
Leidos
in leading a design team Experience in hardware test and measurement and hands-on lab debug Experience with interfaces: ADC/DACs, SerDes, PCIe, JTAG, DDRx LInC Electronic Warfare Original Posting Date: 2024-04-29 While subject to change based on business needs, Leidos reasonably anticipates that this job requisition more »
Employment Type: Permanent
Salary: USD Annual
Posted:

Microelectronics ASIC Design Engineer

National City, California, United States
Leidos
in leading a design team Experience in hardware test and measurement and hands-on lab debug Experience with interfaces: ADC/DACs, SerDes, PCIe, JTAG, DDRx LInC Electronic Warfare Original Posting Date: 2024-04-29 While subject to change based on business needs, Leidos reasonably anticipates that this job requisition more »
Employment Type: Permanent
Salary: USD Annual
Posted:

Microelectronics ASIC Design Engineer

San Diego, California, United States
Leidos
in leading a design team Experience in hardware test and measurement and hands-on lab debug Experience with interfaces: ADC/DACs, SerDes, PCIe, JTAG, DDRx LInC Electronic Warfare Original Posting Date: 2024-04-29 While subject to change based on business needs, Leidos reasonably anticipates that this job requisition more »
Employment Type: Permanent
Salary: USD Annual
Posted:

Microelectronics ASIC Design Engineer

El Cajon, California, United States
Leidos
in leading a design team Experience in hardware test and measurement and hands-on lab debug Experience with interfaces: ADC/DACs, SerDes, PCIe, JTAG, DDRx LInC Electronic Warfare Original Posting Date: 2024-04-29 While subject to change based on business needs, Leidos reasonably anticipates that this job requisition more »
Employment Type: Permanent
Salary: USD Annual
Posted:

Microelectronics ASIC Design Engineer

Saint Petersburg, Florida, United States
Leidos
in leading a design team Experience in hardware test and measurement and hands-on lab debug Experience with interfaces: ADC/DACs, SerDes, PCIe, JTAG, DDRx LInC Electronic Warfare Original Posting Date: 2024-04-29 While subject to change based on business needs, Leidos reasonably anticipates that this job requisition more »
Employment Type: Permanent
Salary: USD Annual
Posted:

Microelectronics ASIC Design Engineer

Rancho Santa Fe, California, United States
Leidos
in leading a design team Experience in hardware test and measurement and hands-on lab debug Experience with interfaces: ADC/DACs, SerDes, PCIe, JTAG, DDRx LInC Electronic Warfare Original Posting Date: 2024-04-29 While subject to change based on business needs, Leidos reasonably anticipates that this job requisition more »
Employment Type: Permanent
Salary: USD Annual
Posted:
JTAG
10th Percentile
£35,250
25th Percentile
£37,500
Median
£48,750
75th Percentile
£60,000