1 to 25 of 30 Permanent Senior Verification Engineer Jobs

Senior Verification Engineer - Lower Saxony - leading optical communications company A global leader in opto-electronic applications for industrial, optical communications, aerospace and defence, life sciences, semiconductor and consumer market and offices in multiple countries is looking for a Senior Verification Engineer for one of … their design centres in Northern Germany. The Senior Verification Engineer will contribute to the development of high-speed System-on-Chip devices in latest CMOS technology for industry-leading optical products including transceivers, transponders and ROADM products. The successful Senior Verification Engineer has the … qualifications: Master’s degree (Dipl.-Ing.) or PhD in electrical engineering or computer science Minimum 5 years of experience in ASIC development Expertise in verification methodologies & tools Strong knowledge of UVM Excellent programming skills in hardware description languages (e.g. SystemVerilog) Good programming skills in scripting languages (e.g. Python, Perl more »

We are seeking a Senior Verification Engineer to join a market-leading Semiconductor IP company developing on-chip network technology. This role can be based in California or Austin, TX. Our client, still relatively young, is experiencing huge demand for their technology. They have achieved massive revenue … growth year-over-year, and are now hiring for a Senior Verification Engineer with cache coherency experience to own verification activities on high performance, low power designs for a major new project. The role will involve working on some of the world's most sophisticated SoC … designs within areas such as autonomous driving and machine learning. The Senior Verification Engineer will be responsible for advanced UVM based testbench development and owning RTL verification test/coverage at system level. The Design Verification Engineer will be a UVM expert, capable of more »

Senior Verification Engineer - Specialised ASIC Design House - West Austria A successful chip design house in Austria is looking to hire a Senior Verification Engineer to join their international team. They offer a wide range of specialised engineering services that are used in automotive, audio more »

Cambridge based Start-up looking for CPU Verification Engineer . CPU Verification - ML/AI This is an exciting join an extremely well-funded machine learning start-up based in Cambridge as a CPU Verification Engineer. Having opened doors to new offices in North Cambridge last … year, my client is creating brand-new AI acceleration hardware and software for edge devices. To continue their ongoing expansion, they now seek a Senior CPU Verification Engineer who can drive the pre-silicon Verification of CPU and VPU designs. The Senior CPU Verification Engineer will have the opportunity to work closely with designers and architects to develop and ensure high quality test plans, functional coverage and scenarios. You will use simulation and formal verification methodologies to execute test plans and scenarios. You will join a newly created team in Cambridge more »

Verification Engineering opportunity with a globally prestigious semiconductor company at their HQ in Cambridge, at senior and staff levels of seniority. A Verification Engineer must have: 4+ years experience in IP level verification Excellent command of System Verilog Experience with UVM Responsibilities include: Owning a … CPU project and developing it through all stages of the verification process Production of verification strategies and test plans Determining causality of problems in the verification process If you would be interested in this role, email your CV to awarner@eu-recruit.com or apply directly via LinkedIn … This role is able to provide visa and relocation support from anywhere in the world Key Words: Verification Engineer/Verification/UVM/Semiconductor By applying to this role you understand that we may collect your personal data and store and process it on our systems. more »

Senior Verification Engineer - Join an innovative international semiconductor company - North Rhine-Westphalia This is an exciting opportunity to join an innovative semiconductor company, Dortmund. An innovative scale-up company, my client specialises in high-speed bus transfer in wireless communications and are already challenging established tech giants … within the industry. This is a great opportunity for an experienced verification engineer, who is looking for the opportunity to take on responsibilities as a technical lead. The key skills needed in this role include: Prepare design verification plan based on design specifications. Develop design verification more »

Senior Verification Engineer - Join a fast growing company in the South of France This is a great opportunity for an experienced Verification Engineer to join a growing team who are developing state-of-the-art semiconductor solutions for the automotive industry. Key skills for this … role: Experience with UVM-based verification Knowledge of hardware description languages (EG: System-Verilog or Verilog) Digital logic fundamentals and understanding Experience in creating and maintaining test plans Debugging skills Proficient in scripting/automation using any standard scripting language like Perl or tcl If you are keen to more »

Senior Verification Engineer - Leading Semiconductor Company - Edinburgh or Newbury One of the world’s leading mixed-signal Semiconductor companies are looking for a Formal Verification Engineer to join their team. This role can either be based in Edinburgh or Newbury. This is an exciting opportunity … to join an established international semiconductor company with over 40 years’ experience, as they look to expand their Verification team. Bachelors or Masters in Electronic Engineering or a related field Experience with UVM/OVM Experience with System Verilog and System Verilog Assertions Strong Debugging skills For more information more »

Are you looking for the next step in your career in UVM Verification? Would you like to learn from skilled experts in a friendly and growing environment with exciting projects? If the answer is yes, then this may be the perfect opportunity for you! I have a key requirement … for an experienced/senior Verification Engineer - to work for an established company based in the Grenoble area - who focus on design and verification services for a number of major clients. As the senior verification engineer, you will be responsible for R&D … projects and the development of verification environments (SystemVerilog/UVM/…), VIP components and giving training to other engineers. Technical skills 3-5+ years' IP or SoC verification experience Confident knowledge with SystemVerilog and UVM methodology SoC architecture Bus communication protocols knowledge - AMBA/AXI etc. OOP more »

Design Verification Engineer - UVM/IP/GPU/CPU Location: Cambridge, UK We are working with the world's leading CPU and GPU development company who are looking to add to their team working on the latest graphics technologies at their HQ in Cambridge. The role will … see you work with a team on the design verification of IP used within the company's GPU and CPUs. This is a permanent role, on-site with the team and visas can be provided for candidate's located outside of the UK. Responsibilities Work on the design verification of the company's CPU and GPU technologies Produce test plans and verification strategies Test bench development in UVM Being part of verification improvement strategies across the CPU and GPU group and the wider verification community Requirements for this Embedded Software Role: Experience working hands-on more »

V&V Senior Engineer | Department: Integration | Automotive focus | Oxfordshire |Competitive Salary | Performance Based Bonus. The role is to manage the Verification and Validation activities on major programmes, automotive or heavy industry. You will lead the verification and validation activities throughout the program. Working with the wider … program team you will take the product requirements and prior experience to define a design verification plan (DVP), advise on optimum test-asset quantities and schedule the tests. Supporting the test engineers and test operations manager (who are responsible for carrying out or monitoring the tests) you’ll ensure … a passion for electrification or cutting-edge engineering and is seeking a strong team-environment, within a high-paced culture. As a V&V Senior Engineer you will be: Leading Verification and Validation activities through all stages of a program. Creation and Management of Design Verification more »

ASIC Verification Engineer - Bristol Hybrid working model and a fantastic compensation package. As a Digital Verification Senior Staff Engineer, you will work within the IP Development team in Bristol, a team with a proven track record in successful IP deliveries into Automotive Microcontrollers. This is … Verilog – UVM testbenches and solve potentially complex problems related to test bench development Be responsible for developing right from scratch UVC components for new verification environments; Be responsible for defining and writing a functional coverage model; Debug failing test cases to root cause; Participate in reviews to ensure test … bench meets quality and is complete; Contribute to verification perspective in Design and Concept meetings; Ensure test bench meets sign-off targets, including coverage, functional safety and test bench qualification; Proactively help increase efficiency of verification activities and mitigate risks early; Contribute to enhancing Verification strategy and more »

the AI market - combining ultra low power for pattern recognition and image sensing components to develop cutting edge IP is looking to hire a Senior Digital IC/SOC Verification Engineer. As Digital IC verification Engineer you will be part of the design team, and responsible … realization of energy-efficient mixed-signal neuromorphic processors/SoCs for AI at the sensor edge. The team is looking for a staff/senior Digital SoC Verification Engineer to implement the verification methodology, and execute the verification plan ensuring that their processors/SoCs … the team members, in collaboration with our international team(s) The ideal candidates for this position will have: Delivered with (as applicable) SoC design verification, SystemVerilog languages (UVM, SVA, SFC), low power verification (UPF methodology), software/hardware co-verification (SystemC/C/C++), Interfaced with more »

Senior Verification Engineer (UVM) We are working with a world-leading technology company who are looking to grow their team in Cambridge, UK with experienced Verification Engineers. This will be a full-time permanent position, offering above market compensation, and where required we can provide relocation … and visa support. You will play a key role in developing hardware verification testbenches for next-gen hardware IP. In particular, we are looking for individuals with experience of complex IP/module level designs. The successful candidate should demonstrate the following: Strong knowledge of hardware verification languages … SystemVerilog) along with assembly, C/C++ and scripting. Experience in various verification methodologies, ideally UVM. Exposure to all stages of verification including requirements collection, test plans, testbench implementation, test case development etc. Experience with complex IP/block/module level designs. Fluency in English. more »

electronic applications for industrial, optical communications, aerospace and defence, life sciences, Semiconductor and consumer market and offices in multiple countries is looking for a Senior SoC Digital Verification Engineer for one of their design centres in the North of Germany to contribute to the development of high … devices in latest CMOS technology for industry-leading optical products including transceivers, transponders and ROADM products. Your responsibilities will include the following: Development of verification specifications and plans for complex SoCs Leading verification efforts on module, cluster and toplevel Implementing UVM environments for functional, netlist and power simulations … Developing reusable verification IP using the UVM framework Developing reference models using System Verilog/Matlab/Python Improving verification flow and methodology Debugging design modules using state-of-the-art simulation and formal tool and methods Collaborating with system engineers on post-silicon debug and device bring more »

We are currently seeking a highly motivated and experienced Senior Engineer Component Verification. As a Senior Engineer Component Verification, you will play a essential role in ensuring the quality and reliability of our products through the development and execution of component testing and verification … advanced and state of the art test systems Do h ardware development on schematic level Work on d ata analysis and assessment Develop new verification methodologie Your Profile You are best equipped for this task if you have: Successfully completed a degree (FH/University) in Electrical Engineering , Mechatronics more »

cleaning up space, sustainability is at the heart of our purpose. So what's your next change? An exciting opportunity has arisen for a Senior Test Engineer (Verification and Validation) within Cyber Security Division in Airbus Defence & Space. This role has been created due to an expansion … effort. You will be employed in a multi-disciplined project team, working closely with Software and Hardware teams in an open office environment. The Senior Cyber Test Engineer (Verification and Validation) is an acknowledged company expert in at least one aspect of testing, and is required to … apply this expertise across more than one project at a time. You will form the primary point of contact for project verification and validation for both the internal and external project teams and will include significant amounts of customer contact. Here at our lively site in Newport, you can more »

FPGA/Embedded System Engineer We think you'll love this opportunity, even if we are slightly biased! As an experienced Design & Verification Engineer Engineer, you will be part of the hardware platform team that builds development platforms for leading CPU and System IP products, that … ability to apply your RTL design skills using SystemVerilog for FPGA and/or ASIC, together with an understanding of FPGA device architecture. For verification you will be using System-Verilog and possibly UVM, this will include coding System Verilog Assertions (SVA) checks, cover-properties, SV coverage groups etc. … Tcl, Make, bash etc will also be required.. Required Skills and Experience: Proven experience of delivering RTL designs in a SoC or FPGA. RTL Verification at both unit and system level, using SV including SVA. Experience of ASIC or FPGA synthesis tools. Unix/Linux skills including shell programming more »

We are working with a global leading semiconductor company looking for Verification Engineers with various levels of seniority to join their team in the BEAUTIFUL city of Cambridge! They can also support visa sponsorship & relocation . As a Senior Verification Engineer your skills will include: · Degree … in Electrical Engineering or similar domain · 3+ years’ experience in designing & implementing verification environments for complex RTL designs · Familiar with UVM · Proficiency in SystemVerilog or Specman e · Excellent understanding of end-to-end verification process at SoC level · Great understanding of microprocessor design, computer architecture (pipelining, memory systems … someone you may know who could be good for the role. If they are successfully placed, we offer a great referral scheme! Key words – Verification/UVM/SystemVerilog/Specman E/Microprocessors/Computer Architecture/Memory Systems/C/C++/RTL Design By applying more »

BRAND NEW ROLE, BRAND NEW TEAM, BRAND NEW COMPANY COMING TO PORTUGAL FOR THE FIRST TIME!!!*** Exciting opportunity for a Senior Digital IC Verification Engineer, to work in the beautiful setting of Portugal - in either Porto or Lisbon. Our client is one of the world’s fastest … They are a billion dollar turnover company with enormous growth and development plans - so business is thriving for them! They are now seeking multiple Senior Digital IC Verification Engineers to help build a brand new team in their new design centre. Role: UVM and System Verilog Verification. Verification Metrics definition, Coverage analysis and debugging skills. Knowledge and experience on setting up an ASIC Verification environment, methodology and flow. vManager, vPlan and Regressions, etc. Digital Test Plan definition/creating/set-up test benches Knowledge of analog/mixed-signal (AMS) environments is a bonus Knowledge more »

I am seeking an AMS Verification Engineer to join a global organisation based in Italy. You will have the chance to contribute to verifying the functionality and performance of Analog and Mixed-Signal designs. Key responsibilities will include, but are not limited to: Developing verification plans for … AMS designs. Implementing and executing verification tests. Collaborating with design engineers to identify and resolve design issues. Performing functional and performance verification of analog and mixed-signal circuits. Developing and maintaining verification infrastructure and automation scripts. Analysing and debugging simulation failures. Documenting verification procedures, results, and … findings. Participating in periodic reporting, design reviews, internal seminars, and training sessions.To be considered for this role, you must possess proven IC verification experience and a strong understanding of tools such as Cadence or Synopsys. For further information, please contact Parm Shergill. more »

Working for a global leader in semiconductor products for a variety of complex, high-speed products; including security and high-speed communications IP. Senior ASIC Design Verification Engineer €70-90k plus package (bonus, relocation, RSUs) Visa sponsorship is available for the right candidate/applicant/… engineer. Requirements: Degree/Masters/PHD qualified in Electronics/Micro-electronics/Physics or similar related fields 8-10+ years' design verification experience of high-speed or security related IP Multiple project/tape-out experience of complex digital products UVM environments/libraries/test … benches for complex IP Fluent English language & communication skills Additional/bonus/"nice-to-have" skills Work experience in Europe FPGA design/verification/implementation/prototyping emulation formal methods/formal verification/SVA - system verilog assertions/jasper gold/onespin Serdes/PCIe more »

one person being responsible for owning a portion of the design, and using a variety of methods to verify it. We're looking for Senior and Principal Verification Engineers to join us either in our Cambridge or Bristol office. You'll interact and collaborate with other engineers from … motivated self-starters who enjoy working on something revolutionary in an innovative company. What You'll Do Verify RISC-V processors and extensions Develop verification solutions (e.g. test benches and test bench components, stimulus generation, formal environments) Define, estimate and track your own work, being responsible for the delivery … of all verification activities related to a component or subsystem from start to finish Review technical specifications, providing feedback from a verification perspective Define detailed verification plans for high performance RISC-V CPU IP Run simulations, hunt bugs and complete root cause analysis of complex issues Track more »

one person being responsible for owning a portion of the design, and using a variety of methods to verify it. We're looking for Senior and Principal Verification Engineers to join us either in our Cambridge or Bristol office. You'll interact and collaborate with other engineers from … motivated self-starters who enjoy working on something revolutionary in an innovative company. What You'll Do Verify RISC-V processors and extensions Develop verification solutions (e.g. test benches and test bench components, stimulus generation, formal environments) Define, estimate and track your own work, being responsible for the delivery … of all verification activities related to a component or subsystem from start to finish Review technical specifications, providing feedback from a verification perspective Define detailed verification plans for high performance RISC-V CPU IP Run simulations, hunt bugs and complete root cause analysis of complex issues Track more »

drives innovation and we offer an international and friendly work environment with an energetic company culture. We are seeking a highly skilled and experienced Senior Verification and Validation Engineer to play a key role in ensuring the quality, reliability, and performance of our robotics products. In this more »