5 Senior Verification Engineer Jobs in Cambridgeshire

Senior Verification Engineer (UVM) We are working with a world-leading technology company who are looking to grow their team in Cambridge, UK with experienced Verification Engineers. This will be a full-time permanent position, offering above market compensation, and where required we can provide relocation … and visa support. You will play a key role in developing hardware verification testbenches for next-gen hardware IP. In particular, we are looking for individuals with experience of complex IP/module level designs. The successful candidate should demonstrate the following: Strong knowledge of hardware verification languages … SystemVerilog) along with assembly, C/C++ and scripting. Experience in various verification methodologies, ideally UVM. Exposure to all stages of verification including requirements collection, test plans, testbench implementation, test case development etc. Experience with complex IP/block/module level designs. Fluency in English. more »

FPGA/Embedded System Engineer We think you'll love this opportunity, even if we are slightly biased! As an experienced Design & Verification Engineer Engineer, you will be part of the hardware platform team that builds development platforms for leading CPU and System IP products, that … ability to apply your RTL design skills using SystemVerilog for FPGA and/or ASIC, together with an understanding of FPGA device architecture. For verification you will be using System-Verilog and possibly UVM, this will include coding System Verilog Assertions (SVA) checks, cover-properties, SV coverage groups etc. … Tcl, Make, bash etc will also be required.. Required Skills and Experience: Proven experience of delivering RTL designs in a SoC or FPGA. RTL Verification at both unit and system level, using SV including SVA. Experience of ASIC or FPGA synthesis tools. Unix/Linux skills including shell programming more »

Job DescriptionDesign Verification Engineer - UVM/IP/GPU/CPULocation: Cambridge, UKWe are working with the world's leading CPU and GPU development company who are looking to add to their team working on the latest graphics technologies at their HQ in Cambridge. The role will see … you work with a team on the design verification of IP used within the company's GPU and CPUs. This is a permanent role, on-site with the team and visas can be provided for candidate's located outside of the UK.ResponsibilitiesWork on the design verification of the … company's CPU and GPU technologiesProduce test plans and verification strategiesTest bench development in UVMBeing part of verification improvement strategies across the CPU and GPU group and the wider verification communityRequirements for this Embedded Software Role: Experience working hands-on in IP level or block-level verificationExpertise more »

Job DescriptionFPGA/Embedded System EngineerWe think you'll love this opportunity, even if we are slightly biased! As an experienced Design & Verification Engineer Engineer, you will be part of the hardware platform team that builds development platforms for leading CPU and System IP products, that target … ability to apply your RTL design skills using SystemVerilog for FPGA and/or ASIC, together with an understanding of FPGA device architecture. For verification you will be using System-Verilog and possibly UVM, this will include coding System Verilog Assertions (SVA) checks, cover-properties, SV coverage groups etc.You … Python, Tcl, Make, bash etc will also be required.. Required Skills and Experience: Proven experience of delivering RTL designs in a SoC or FPGA.RTL Verification at both unit and system level, using SV including SVA.Experience of ASIC or FPGA synthesis tools.Unix/Linux skills including shell programming/scripting more »

Job DescriptionSenior Verification Engineer (UVM)We are working with a world-leading technology company who are looking to grow their team in Cambridge, UK with experienced Verification Engineers.This will be a full-time permanent position, offering above market compensation, and where required we can provide relocation and … visa support.You will play a key role in developing hardware verification testbenches for next-gen hardware IP. In particular, we are looking for individuals with experience of complex IP/module level designs.The successful candidate should demonstrate the following:Strong knowledge of hardware verification languages (SystemVerilog) along with … assembly, C/C++ and scripting. Experience in various verification methodologies, ideally UVM.Exposure to all stages of verification including requirements collection, test plans, testbench implementation, test case development etc.Experience with complex IP/block/module level designs.Fluency in English. more »