15 of 15 Permanent Tcl Jobs in the UK

test sequences/scripts for execution of spacecraft tests from the Central Checkout System (CCS) Spacecraft systems and subsystem technical knowledge Programming and scripting languages such asC, Java, python, TCL, VBA Knowledge of system testing & Verification The Benefits: Hourly rate circa £55 via Umbrella company Training and Development Does this sound like your next career move? Apply today. Working with More ❯

FPGA implementation Experience with ASIC flows or FPGA-ASIC migration Familiarity with standards/quality in the aerospace/space domain (e.g. radiation mitigation, reliability) Experience with scripting (Python, Tcl, Bash, etc.) for automation and flow integration Knowledge of formal verification, constraint generation, or static analysis tools Experience working in remote/hybrid settings, distributed teams What We Offer Competitive More ❯

e.g. error correction, equalisation, beamforming, channel estimation) Familiarity with AMBA bus protocols Practical experience with UVM verification methodologies C++/SystemC experience for modelling and integration Scripting skills (Python, Tcl, Bash) for automation and flows Understanding of project methodologies (agile, waterfall, requirements traceability) Experience with AMD/Xilinx FPGAs and/or ASIC backend EDA flows What We Offer Competitive More ❯

design, ideally including work at 7nm or below Practical knowledge of timing closure, clock tree design, physical verification, and sign-off processes Strong scripting/programming ability (e.g. Python, Tcl) Email - jordan.browne@ic-resources.com Tel - 01189073075 LinkedIn - https://www.linkedin.com/in/jordan-browne-b4a08b20b/ More ❯

bring-up, and debug of HAPS-based setups Key skills: FPGA firmware development, experience in Interfaces such as SPI, I2C, UART, GPIO, Raspberry Pi, Test automation scripting languages – Python, TCL to 10 years of experience Strong experience in CPLD/FPGA firmware development using Verilog/SystemVerilog Proficiency in scripting languages (e.g., Python, TCL) for automation and debug Hands-on More ❯

and verification, including: Defining functional requirements for verification environments & metrics SystemVerilog UVM testbenches Formal proof verification Understanding of C test cases and C code Scripting languages (e.g. Python, Perl, TCL) Desirable skills Experience with formal verification tools (JasperGold, VC Formal) Familiarity with C/C++ development Prior SSD experience with storage interfaces such as SAS or PCIe (NVMe preferred) What More ❯

ASIC or FPGA design flows , including synthesis and timing closure. Understanding of communication systems and protocols is a strong advantage. Competency in scripting languages such as Python, Perl , or Tcl for automation is desirable. On offer is a competitive base salary + RSUs and the opportunity to work on cutting edge designs. You must be eligible to work in the More ❯

timing closure, CDC, RDC, and coverage analysis. Profile Essential Skills Degree in Computer Science, Engineering, or related field. Strong experience with SystemVerilog or VHDL . Competence in scripting (Python, Tcl). Knowledge of digital design flows. Desirable Experience Processor design and application-specific blocks. High-speed serial interfaces & complex third-party IP integration. Arithmetic pipeline and floating-point design. Design More ❯

SystemVerilog Assertions) Testbench design with verification frameworks like UVM/OVM, e, VMM Debugging skills – RTL – Testbench, OOP – Gate level (including SDF) Scripting experience with Ruby, sh/csh, TCL, Make, Perl Power aware verification (using CPF/UPF) This position is based in Edinburgh. This is a hybrid remote position and will follow a 2+ day in-office work More ❯

power design, high-speed interfaces (e.g., HBM, DDR5, PCIe), and standard on-chip protocols. Experience with microarchitecture exploration, performance modelling, and power optimisation techniques. Scripting ability in Python or TCL to automate design and analysis workflows. This is a superb opportunity to shape next-generation AI hardware from the ground up, working with a passionate team that values innovation, technical More ❯

of ITIL (nice to have) Experience in an IT support/help desk or SW support environment is preferable 4 years experience with Enovia Knowledge/experience in: MQL, TCL Change process Preferred: Project management, Requirements gathering, Testing. Services advertised by Gold Group are those of an Agency and/or an Employment Business. We will contact you within the More ❯

of ITIL (nice to have) Experience in an IT support/help desk or SW support environment is preferable 4 years experience with Enovia Knowledge/experience in: MQL, TCL Change process Preferred: Project management, Requirements gathering, Testing. Services advertised by Gold Group are those of an Agency and/or an Employment Business. We will contact you within the More ❯

analyses) or similar. Additional experience with radio frequency systems, DSP, embedded software and/or requirements management using DOORS would be beneficial. Further experience with C++, VHDL, Python and Tcl would be desirable. Due to the nature of projects, the role is mostly onsite, although occasional home working is possible when projects allow. In return, on offer is a competitive More ❯

of data structures, algorithms and databases Demonstrated proficiency in modern C++, debugging, and general software development skills Nice to have: Scripting language skills in one of: Lisp, Skill, Python, TCL Interest in digital or analog circuit design Experience with GUI frameworks, such as Qt, MFC (Windows) Familiarity with development on Linux/Unix or Windows Exposure to build and version More ❯

and attention to detail. Ability to work effectively within multidisciplinary teams and liaise directly with clients. Desirable: Familiarity with version control systems (e.g., Git, SVN). Scripting experience in TCL or Python for tool automation. Additional Information: Due to the sensitive nature of the work, successful candidates must be eligible for UK Security Clearance. Pre-employment screening will be required. More ❯