verification, Synopsys DesignCompiler for synthesis and STA, Spyglass for linting, etc. Experience in writing IP design specifications and block level modules Good knowledge of UVM, SVA, VIP, and UPF for digital IC design verification Familiar with Linux OS, revision control like Git and scripting languages like Bash, Tcl, and Python more »
simulation and verification, Synopsys DesignCompiler for synthesis and STA, Spyglass for linting, etc.Experience in writing IP design specifications and block level modulesGood knowledge of UVM, SVA, VIP, and UPF for digital IC design verificationFamiliar with Linux OS, revision control like Git and scripting languages like Bash, Tcl, and PythonDesirable Skills more »
/CD automation and manual tests through electrical test equipment.Skills and Experience:Strong experience in digital custom IC design.Strong experience in digital IC verification (UVM, SVA, VIP, and UPF), for ASIC implementation.Strong RTL coding with Verilog and System Verilog.Strong knowledge of interface technology (I2C, SPI, UART, SWD, JTAG, etc).Strong more »
automation and manual tests through electrical test equipment. Skills and Experience: Strong experience in digital custom IC design. Strong experience in digital IC verification (UVM, SVA, VIP, and UPF), for ASIC implementation. Strong RTL coding with Verilog and System Verilog. Strong knowledge of interface technology (I2C, SPI, UART, SWD, JTAG more »
Cambridge, Cambridgeshire, East Anglia, United Kingdom
Langham Recruitment Limited
automation and manual tests through electrical test equipment. Qualifications and Experience: Strong experience in digital custom IC design. Strong experience in digital IC verification (UVM, SVA, VIP, and UPF), for ASIC implementation. Strong RTL coding with Verilog and System Verilog. Strong knowledge of interface technology (I2C, SPI, UART, SWD, JTAG more »
for FPGA and/or ASIC, together with an understanding of FPGA device architecture. For verification you will be using System-Verilog and possibly UVM, this will include coding System Verilog Assertions (SVA) checks, cover-properties, SV coverage groups etc.You will be part of a large team working within a … plus, ideally, some grounding in assembly language and object-orientated coding (e.g. C++)Experience with the implementation of ASIC/SoC RTL in FPGASV UVM test benches, using UVMVerification IPs Xilinx FPGA technology.Synopsys tool flows.If you have the required experience and want to be part of a team that more »
Cambridge, England, United Kingdom Hybrid / WFH Options
Connected Consulting Limited
for FPGA and/or ASIC, together with an understanding of FPGA device architecture. For verification you will be using System-Verilog and possibly UVM, this will include coding System Verilog Assertions (SVA) checks, cover-properties, SV coverage groups etc. You will be part of a large team working within … ideally, some grounding in assembly language and object-orientated coding (e.g. C++) Experience with the implementation of ASIC/SoC RTL in FPGA SV UVM test benches, using UVMVerification IPs Xilinx FPGA technology. Synopsys tool flows. If you have the required experience and want to be part of a more »
Design Verification Engineer - UVM/IP/GPU/CPU Location: Cambridge, UK We are working with the world's leading CPU and GPU development company who are looking to add to their team working on the latest graphics technologies at their HQ in Cambridge. The role will see you … verification community Requirements for this Embedded Software Role: Experience working hands-on in IP level or block-level verification Expertise working in UVM (UniversalVerificationMethodology) Experience working on CPUs, GPUs or microarchitecture is a plus Experience working on complex RTL designs Keywords: Verification/Verification Engineer/Design Verification …/CPU/GPU/UVM/IP/IP level/UniversalVerificationMethodology/United Kingdom/UK/Cambridge By applying to this role, you understand that we may collect your data and store and process it on our systems. For more information please see our Privacy more »
Job DescriptionDesign Verification Engineer - UVM/IP/GPU/CPULocation: Cambridge, UKWe are working with the world's leading CPU and GPU development company who are looking to add to their team working on the latest graphics technologies at their HQ in Cambridge. The role will see you work … the wider verification communityRequirements for this Embedded Software Role: Experience working hands-on in IP level or block-level verificationExpertise working in UVM (UniversalVerificationMethodology)Experience working on CPUs, GPUs or microarchitecture is a plusExperience working on complex RTL designsKeywords: Verification/Verification Engineer/Design Verification/CPU …/GPU/UVM/IP/IP level/UniversalVerificationMethodology/United Kingdom/UK/CambridgeBy applying to this role, you understand that we may collect your data and store and process it on our systems. For more information please see our Privacy Notice (https:/ more »