Verilog Jobs in Scotland

5 Verilog Jobs in Scotland

Analog/Mixed Signal IC Design Engineering Manager

Edinburgh
IC Resources
and managing all aspects of a design from concept to production silicon, including product specification, architectural development, transistor-level and RTL design, modelling (Matlab, Verilog), verification (block and chip level), DFT, layout, physical design, lab validation. The successful application will have all of some of the following: Degree MSc in more »
Employment Type: Permanent
Posted:

Electronics Design Engineer

Glasgow, Lanarkshire, Scotland, United Kingdom
Hybrid / WFH Options
Verto People
understanding of analogue and digital circuits. Understanding of product design from spec with consideration of DFT and DFM EMC knowledge and experience FPGAs using Verilog Good understanding of test automation tools e.g. LabView Commutable to Glasgow more »
Employment Type: Permanent, Work From Home
Salary: £60,000
Posted:

Senior Hardware Engineer

Glasgow, Scotland, United Kingdom
RedHolt
transmission and distribution industry. REQUIRED EXPERIENCE: • Minimum of 5-7 years experience in circuit design and circuit layout. • Familiarity with Microprocessor designs, FPGA development (Verilog), analog measurement, analog filtering, digital filtering, A/D implementations, control and power amplifiers. • Familiarity with various simulation tools (SPICE, PSIM, ModelSim). • An understanding more »
Posted:

Application Specific Integrated Circuit Design Engineer

Edinburgh, Scotland, United Kingdom
IC Resources
and analog products. The key skills needed for the Digital Design Engineer are: RTL design experience. Implementation of complex digital circuits and sub-systems. Verilog or System Verilog knowledge. An understanding of digital system-level design, including the use of standard bus protocols, bus architecture design and chip-level clock more »
Posted:

Verification engineer

Edinburgh
IC Resources
requirements: Seeking for a 5+ year of experience Design Verification engineer for a 5-month contract (June-October). Hands on experience in system verilog based UVM environment. system verilog assertion, GLS simulation setup/debugging a must. Need to quickly ramp-up and start debugging existing testcase and checkers. more »
Employment Type: Contract
Posted:
Verilog
Scotland
25th Percentile
£53,750
Median
£57,500
75th Percentile
£61,250