1 to 25 of 64 Remote Verilog Jobs

in Python and TCL would be advantageous. Detailed knowledge of the FPGA design flow from RTL design, simulation, synthesis, place & route, constraints, and timing closure Strong RTL skills in Verilog/System Verilog or VHDL with source code under version control. Scripting skills in Python basic level C/C++. Knowledge and expertise in debugging designs in both simulation and More ❯

environment where engineers work across the full development flow, and where technical ownership is both expected and supported. What they’re looking for: Proven expertise in RTL design using Verilog or SystemVerilog for complex FPGA or ASIC systems Strong grasp of synthesis, timing closure, and resource optimisation for high-speed signal processing applications Experience developing and integrating IP in multi More ❯

FPGA/Firmware delivery teams What we need from you What you really must have: Experience leading teams or managing packages of work. Design tools such as Xilinx, TCL, Verilog, System Verilog and UVM FPGA architectures such as Xilinx 7. Xilinx UltraScale; Intel (Altera) or Microsemi (Actel). Fast interfaces such as PCIe, Ethernet, and JESD is also required. Auto More ❯

will be responsible for: - Hardware requirements capture and management. - Concept development for complex functions and systems. - FPGA design and analysis. - Experience in verification techniques using either VHDL or System Verilog/UVM. - Production of material for design reviews. - Development of test planning, integration and design verification. - Ensure that all firmware designs follow the company firmware process. - Experience using FPGA technologies More ❯

UK office. Your CV will show your: Good degree in electronics or another technical subject from a top university Extensive experience developing complex and well-structured RTL in SystemVerilog, Verilog or VHDL, with particular attention to design approach and performance constraints And as a skilled FPGA Design Engineer you will also have, as your CV demonstrates: A strong understanding of More ❯

in FPGA's Architecting and allocating an embedded system between FW and SW Xilinx embedded systems development (PL, PS, SDK, ARM, Microblaze) Xilinx RFSoC/MPSoC development VHDL/Verilog FPGA development Bring up and debug of FPGA based HW and FW Matlab/C/C++ Masters Degree Work from Home: This position will be approximately 40% onsite. More ❯

cases and regression suites to improve verification efficiency and coverage. Required Skills and Experience: Solid understanding of SoC Verification (using C Testcases), hardware description and verification languages e.g. SystemVerilog, Verilog, VHDL. Understanding of Computer architecture, bus protocols (e.g., AXI, AHB), and peripherals. Experience with Tcl, Python or other scripting languages. "Nice To Have" Skills and Experience: Experience with ARM-based More ❯

The job: Leading and mentoring a team of FPGA engineers Owning the technical direction for FPGA development across several product lines Designing and developing FPGA solutions using VHDL or Verilog Overseeing verification, validation, and integration of designs Working on high-performance designs, often involving video or RF signal processing The ideal candidate: A degree in Electrical Engineering, Computer Science, or … something similar At least 10 years of hands-on FPGA design experience Comfortable leading others and making technical decisions Solid experience with VHDL or Verilog and common FPGA toolsets A good grasp of high-speed digital design You’ll need to be eligible for UK Security Clearance The offer: Salary up to £75,000 (depending on experience) Hybrid working and More ❯

Master's degree in Electronic Engineering or related field - 12+ years of digital ASIC verification experience - Practical experience and understanding of: - Requirement capture, verification planning and coverage closure - System Verilog and UVM test benches - Creation of UVM test benches - System Verilog assertions - Managing regression and debugging failures - Scripting languages (e.g. Perl/Python/TCL) - Team player with good oral More ❯

and experience: Experience in ASIC RTL design, ideally for Multimedia IP (ISPs, DPUs, VPUs) or related IP (CPU, GPU, interconnect, memory controllers, high-performance peripherals). Proficiency in System Verilog, Verilog or VHDL. Exposure to all stages of design: concept, specification, implementation, testing, documentation, and support. Proficiency in UNIX and scripting languages such as TCL, Perl, Python, or shell scripting. More ❯

Requirements: A Bachelor's degree or higher in Computer/Electrical Engineering or Computer Science. Experience with FPGA/ASIC design and verification. Proficiency in design languages: SystemVerilog/Verilog/VHDL. Strong foundation in C/C++ programming. Familiarity with common FPGA tools. Exceptional analytical and troubleshooting skills. Skills: Demonstrable capabilities in RTL logic design, verification, and synthesis. Mastery More ❯

digital design, verification, and synthesis, while targeting advanced semiconductor technologies down to 2nm process nodes. What we need from you: Design & Modelling Proficient in modeling digital systems using VHDL, Verilog, and SystemVerilog Strong foundation in combinational and sequential logic , including FSMs, pipelines, and datapaths Skilled in Register-Transfer Level (RTL) design with a focus on modular, reusable, and synthesizable components More ❯

up culture. Senior FPGA Engineer essential requirements At least 5+ years relevant FPGA experience Good understanding of the PCIe spec OR very experienced designer of FPGA cores. Familiarity with Verilog, System Verilog Senior FPGA Engineer desirable skills High-speed protocols Ethernet, PCIe, USB, NVMe, CXL etc C/C++. Linux, Bash, Python, VHDL, tcl Jira, Git VHDL High speed transceivers … Memory controllers PCB Layout ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ Position : Senior FPGA Engineer Location : WFH within reach of Portsmouth Salary : £60-95k Benefits: Bonus, Pension, Healthcare Key Skills : FPGA design, Verilog Apply: jamie AT enterpriserecruitment DOT com More ❯

up culture. Senior FPGA Engineer essential requirements At least 5+ years relevant FPGA experience Good understanding of the PCIe spec OR very experienced designer of FPGA cores. Familiarity with Verilog, System Verilog Senior FPGA Engineer desirable skills High-speed protocols Ethernet, PCIe, USB, NVMe, CXL etc C/C++. Linux, Bash, Python, VHDL, tcl Jira, Git VHDL High speed transceivers … Memory controllers PCB Layout Position : Senior FPGA Engineer Location : WFH within reach of Portsmouth Salary : £60-95k Benefits: Bonus, Pension, Healthcare Key Skills : FPGA design, Verilog Apply: jamie AT enterpriserecruitment DOT com JBRP1_UKTJ More ❯

up culture. Senior FPGA Engineer essential requirements At least 5+ years relevant FPGA experience Good understanding of the PCIe spec OR very experienced designer of FPGA cores. Familiarity with Verilog, System Verilog Senior FPGA Engineer desirable skills High-speed protocols Ethernet, PCIe, USB, NVMe, CXL etc C/C++. Linux, Bash, Python, VHDL, tcl Jira, Git VHDL High speed transceivers … Memory controllers PCB Layout Position : Senior FPGA Engineer Location : WFH within reach of Portsmouth Salary : £60-95k Benefits: Bonus, Pension, Healthcare Key Skills : FPGA design, Verilog Apply: jamie AT enterpriserecruitment DOT com JBRP1_UKTJ More ❯

up culture. Senior FPGA Engineer essential requirements At least 5+ years relevant FPGA experience Good understanding of the PCIe spec OR very experienced designer of FPGA cores. Familiarity with Verilog, System Verilog Senior FPGA Engineer desirable skills High-speed protocols – Ethernet, PCIe, USB, NVMe, CXL etc C/C++. Linux, Bash, Python, VHDL, tcl Jira, Git VHDL High speed transceivers … Memory controllers PCB Layout Position : Senior FPGA Engineer Location : WFH within reach of Portsmouth Salary : £60-95k Benefits: Bonus, Pension, Healthcare Key Skills : FPGA design, Verilog Apply: jamie AT enterpriserecruitment DOT com More ❯

experts to turn demanding vision algorithms into robust hardware implementations. Key Responsibilities: Design, develop, and optimize FPGA architectures for real-time image processing applications Implement algorithms using VHDL/Verilog or HLS Collaborate with software and hardware teams to ensure seamless integration Perform simulation, synthesis, and validation of designs using industry-standard tools (ModelSim, Vivado, etc.) Support system bring-up … performance optimization Required Qualifications: Degree in Electrical Engineering, Electronics, Computer Engineering, or related field Proven experience with FPGA development (Xilinx or Intel/Altera) Strong knowledge of VHDL/Verilog and/or High-Level Synthesis (HLS) Solid understanding of digital signal processing (DSP) and image processing principles Experience with simulation, debugging, and testing tools Fluent in French (written and More ❯

performance verification, CHI/PCIe/CXL, DDRx/LPDDRx integration verification in SoC RTL. Your key responsibilities will include writing test plans, defining test methodologies, developing SystemVerilog/Verilog testbenches and tests, and debugging of test failures and issues. Working with project management and leads on planning tasks, setting schedules, and quality checkpoints. Collaborate with engineers from other teams … modelling, performance analysis, silicon validation, FPGA and board development Staff Engineers are also encouraged to mentor junior members Required Skills and Experience : Proven understanding of digital hardware design and Verilog/Systemverilog HDL Experience in SoC verification using UVM and Embedded Low-level programming experience including C/C++ and assembly language(preferably ARM) Experienced in one or more of More ❯

security clearance. It would be desirable if you had: Experience of auto-generated code using model driven engineering using MATLAB and Simulink tools. Experience of design tools such as Verilog, System Verilog and UVM. Experience within the defence industry. What we need from you: Personal attributes and values are just as important to us as technical ability, so we are More ❯

communication protocols and signal exploitation techniques Candidates must be willing and eligible to go through high level security clearance checks Desirable Skills: Experience with FPGAs (e.g. RFSoC), VHDL/Verilog Familiarity with Linux, GitLab, and collaborative DevOps environments Prior work in defence, intelligence, or covert communications systems O.K. I'm in what's next? Apply with your latest CV below More ❯

cases and regression suites to improve verification efficiency and coverage. Required Skills and Experience : Solid understanding of SoC Verification (using C Testcases), hardware description and verification languages e.g. SystemVerilog, Verilog, VHDL. Understanding of Computer architecture, bus protocols (e.g., AXI, AHB), and peripherals. Experience with Tcl, Python or other scripting languages. "Nice To Have" Skills and Experience : Experience with ARM-based More ❯

Low Level Embedded Software Engineer at Leonardo: Strong low level embedded C programming skills A solid grasp of C++ Experience in testing and integrating software with firmware (VHDL/Verilog) and hardware Excellent debugging skills and application of various strategies Use of RTOS's such as VxWorks or embedded Linux Deployment of software to distributed hardware platforms, multicore programming, memory More ❯

focus on performance, low power, and scalability. You will work closely with cross-functional teams including RF, firmware, verification, and architecture. Key Responsibilities Design and implement digital logic in Verilog/SystemVerilog for Wi-Fi MAC/PHY and related IP blocks Collaborate on micro-architecture definition and specifications Drive RTL design from concept through synthesis and verification to GDSII … required Requirements Bachelor’s or Master’s degree in Electrical Engineering, Computer Engineering, or related field 5+ years of hands-on ASIC design experience Strong RTL design skills using Verilog or SystemVerilog Experience in SoC development and integration Familiarity with Wi-Fi, wireless MAC/PHY, or DSP-based systems is a plus Good scripting skills (Python, Perl, or TCL More ❯

of static & formal verification tools inc. property checking using SVA or PSL Expertise in clock/reset and low power design & verification techniques. Experience of RTL coding (VHDL/Verilog/System Verilog). Experience with Linux and Windows environments including scripting languages. Excellent presentation and communication skills in English (knowledge of other European languages would be an advantage). More ❯

add multiple engineers to their growing R&D team. We have FPGA/Firmware Engineering roles available! Core skills we’re looking for: FPGA design – ideally with SystemVerilog/Verilog experience Strong programming capabilities using C, C++, Python or Rust Exposure to Linux operating systems Any exposure to Ai, Machine Learning or related tech is beneficial but not essential. If More ❯