1 to 25 of 65 Remote Verilog Jobs

other high-integrity engineering domains. Strong communication skills and ability to work within structured engineering processes. Technical Knowledge Beneficial to the Role VHDL , Verilog or SystemVerilog for digital design and implementation. Verification testbench architecture using SystemVerilog or C++ . Advanced verification methodologies such as OSVVM , UVVM or advanced VHDL verification ...

FPGA architectures and design implementations using VHDL, Simulink, etc., targeting Xilinx, Intel, and Microsemi devices.Ability to verify complex FPGA implementations using VHDL and System Verilog/UVM test-bench methodologies.Proficiency in FPGA design toolsets and Mentor verification tools (QuestaSim & ModelSim).Strong skills in generating low-level software (C) for FPGA ...

FPGA architectures and design implementations using VHDL, Simulink, etc., targeting Xilinx, Intel, and Microsemi devices.Ability to verify complex FPGA implementations using VHDL and System Verilog/UVM test-bench methodologies.Proficiency in FPGA design toolsets and Mentor verification tools (QuestaSim & ModelSim).Strong skills in generating low-level software (C) for FPGA ...

FPGA architectures and design implementations using VHDL, Simulink, etc., targeting Xilinx, Intel, and Microsemi devices.Ability to verify complex FPGA implementations using VHDL and System Verilog/UVM test-bench methodologies.Proficiency in FPGA design toolsets and Mentor verification tools (QuestaSim & ModelSim).Strong skills in generating low-level software (C) for FPGA ...

architectures and design implementations using VHDL, Simulink, etc., targeting Xilinx, Intel, and Microsemi devices. Ability to verify complex FPGA implementations using VHDL and System Verilog/UVM test-bench methodologies. Proficiency in FPGA design toolsets and Mentor verification tools (QuestaSim & ModelSim). Strong skills in generating low-level software ...

architectures and design implementations using VHDL, Simulink, etc., targeting Xilinx, Intel, and Microsemi devices. Ability to verify complex FPGA implementations using VHDL and System Verilog/UVM test-bench methodologies. Proficiency in FPGA design toolsets and Mentor verification tools (QuestaSim & ModelSim). Strong skills in generating low-level software ...

Providing progress reports What experience you need to be the successful FPGA Engineer: At least 5 years' experience of developing FPGA using VHDL or Verilog Experienced with Mentor Graphics FPGA development tools including HDL Designer, ModelSim/Questa and Precision Familiar with Xilinx/Intel (Altera)/Microsemi (Actel) design ...

Providing progress reports What experience you need to be the successful FPGA Engineer: At least 5 years' experience of developing FPGA using VHDL or Verilog Experienced with Mentor Graphics FPGA development tools including HDL Designer, ModelSim/Questa and Precision Familiar with Xilinx/Intel (Altera)/Microsemi (Actel) design ...

Providing progress reports What experience you need to be the successful FPGA Engineer: At least 5 years’ experience of developing FPGA using VHDL or Verilog Experienced with Mentor Graphics FPGA development tools including HDL Designer, ModelSim/Questa and Precision Familiar with Xilinx/Intel (Altera)/Microsemi (Actel) design ...

architecture, design, and implementation of FPGA solutions for high-performance, low-latency, or high-throughput systems.Provide technical direction for RTL design (VHDL/Verilog/SystemVerilog), simulation, timing closure, and hardware validation.Define and enforce design standards, IP reuse strategies, and verification methodologies.Ensure design meets performance, power, area, and reliability targets.Work ...

BEng or MEng in Engineering, Electronics, or related subjects (upper second class or equivalent) Extensive post-graduate engineering experience Desirable: Knowledge of SPICE, HDL, Verilog, or FPGA Experience with physics modelling tools such as Ansys/HFSS Previous HMI or display industry experience What You Can Expect My client offers ...

FPGA architecture design Experience with DSP design and signal processing (RF, ADCs, DACs) Hands-on digital logic design at RTL level VHDL or Verilog exposure in a commercial environment Experience with Xilinx toolchains is a bonus (Vivado, Vitis, Petalinux ...

able to offer improvements to efficiency and quality for both the design flow and the final product. Required skills: Knowledge of an RTL language (Verilog, SystemVerilog) for complex ASIC/FPGA products A strong skillset in delivering digital designs in the ASIC and FPGA industry Optimisation of timing and hardware ...

able to offer improvements to efficiency and quality for both the design flow and the final product. Required skills: Knowledge of an RTL language (Verilog, SystemVerilog) for complex ASIC/FPGA products A strong skillset in delivering digital designs in the ASIC and FPGA industry Optimisation of timing and hardware ...

/MS in Electrical Engineering, Computer Engineering, or Computer Science 5+ years’ hands-on experience in microarchitecture and RTL development Strong proficiency in Verilog and SystemVerilog Familiarity with industry-standard EDA tools and methodologies Experience with large, high-speed, pipelined, and low-power designs Deep understanding of on-chip interconnects ...

security- or cryptography-related field + 2 years of experience. Strong knowledge of cryptographic algorithms and hardware architectures. Proficiency in Verilog and SystemVerilog. Experience developing testbenches for verification. Familiarity with RISC-V processor cores. Post-quantum cryptography experience is highly desirable. Additional Information Sponsorship can be provided for candidates already ...

security- or cryptography-related field + 2 years of experience. Strong knowledge of cryptographic algorithms and hardware architectures. Proficiency in Verilog and SystemVerilog. Experience developing testbenches for verification. Familiarity with RISC-V processor cores. Post-quantum cryptography experience is highly desirable. Additional Information Sponsorship can be provided for candidates already ...

security- or cryptography-related field + 2 years of experience. Strong knowledge of cryptographic algorithms and hardware architectures. Proficiency in Verilog and SystemVerilog. Experience developing testbenches for verification. Familiarity with RISC-V processor cores. Post-quantum cryptography experience is highly desirable. Additional Information Sponsorship can be provided for candidates already ...

digital/mixed signal analog Verification with test bench design, connect modules, electrical/discrete partitioning.Good Scripting skills.Cadence APS, SpectreX/digital solver.System Verilog Assertions.Cadence Virtuoso Framework: Schematic editor, Assembler, AMS.High-speed communication systems such as SerDes.Good digital verification background with some Specman/SV UVM exposure and/ ...

have: Proven experience within AMS (Analog Mixed Signal) Verification Expertise in test bench design, behavioral modelling An understanding of analog blocks Experience in System Verilog Assertions A University degree within Microelectronics or similar field Excellent communication and team working skills Our client offers a competitive salary, stock options and visa ...

have: Proven experience within AMS (Analog Mixed Signal) Verification Expertise in test bench design, behavioral modelling An understanding of analog blocks Experience in System Verilog Assertions A University degree within Microelectronics or similar field Excellent communication and team working skills Our client offers a competitive salary, stock options and visa ...

support your professional growth in a diverse, inclusive environment. Key Responsibilities: Design high-performance IP targeting FPGA/Adaptive SoC technology using System Verilog RTL. Deliver synthesis-ready designs that meet timing and integration requirements. Collaborate with engineering teams to ensure quality and performance targets are met. Skills, Experience … Abilities Required: Expertise in System Verilog RTL design Hands-on experience with 100Gb Ethernet, PCIe Gen5, AMBA/AXI In-depth knowledge of FPGA/Adaptive SoC design flow, including place & route (P&R) and timing closure Proficiency in Vivado/Vitis Strong scripting skills in Python and Tcl Experience ...

side channel vulnerabilities and appropriate countermeasures Deliver production ready designs targeting both ASIC and FPGA platforms Own the design lifecycle: specification, micro-architecture, coding (Verilog/VHDL), synthesis, timing closure, and verification Support design activities through scripting and automation (Python or similar) for verification, analysis, and testing workflows Partner effectively … architectures Expertise in cryptographic primitive design and implementation Experience translating algorithms into efficient hardware designs, with an emphasis on power and area optimisation Solid Verilog/VHDL experience with hands-on verification knowledge, and timing analysis awareness Standard Information: Stock options - a genuine stake in the future you're helping ...

side channel vulnerabilities and appropriate countermeasures Deliver production ready designs targeting both ASIC and FPGA platforms Own the design lifecycle: specification, micro-architecture, coding (Verilog/VHDL), synthesis, timing closure, and verification Support design activities through scripting and automation (Python or similar) for verification, analysis, and testing workflows Partner effectively … architectures Expertise in cryptographic primitive design and implementation Experience translating algorithms into efficient hardware designs, with an emphasis on power and area optimisation Solid Verilog/VHDL experience with hands-on verification knowledge, and timing analysis awareness Standard Information: Stock options - a genuine stake in the future you're helping ...

side channel vulnerabilities and appropriate countermeasures Deliver production ready designs targeting both ASIC and FPGA platforms Own the design lifecycle: specification, micro-architecture, coding (Verilog/VHDL), synthesis, timing closure, and verification Support design activities through scripting and automation (Python or similar) for verification, analysis, and testing workflows Partner effectively … architectures Expertise in cryptographic primitive design and implementation Experience translating algorithms into efficient hardware designs, with an emphasis on power and area optimisation Solid Verilog/VHDL experience with hands-on verification knowledge, and timing analysis awareness Standard Information: Stock options - a genuine stake in the future you're helping ...