Cambridge, Cambridgeshire, United Kingdom Hybrid / WFH Options
Arm Limited
in Python and TCL would be advantageous. Detailed knowledge of the FPGA design flow from RTL design, simulation, synthesis, place & route, constraints, and timing closure Strong RTL skills in Verilog/System Verilog or VHDL with source code under version control. Scripting skills in Python basic level C/C++. Knowledge and expertise in debugging designs in both simulation and More ❯
ARM SOC FPGAs (e.g., Xilinx MPSOC) and/or ASICs. You will also write and debug tests and sequences for end-to-end simulation on UVM framework with System Verilog Assertions, as well as C++ based software-driven validation on SOC evaluation boards (Xilinx MPSOC) running Linux. The ideal candidate is passionate about digital design, has excellent analytical and debugging … and integration targeting ARM SOC FPGAs (e.g., Xilinx MPSOC) and/or ASICs. Write and debug tests/sequences for end-to-end simulation on UVM framework with System Verilog Assertions. Develop and debug C++ based software-driven validation on SOC evaluation boards running Linux. Utilize state-of-the-art EDA tools and methodologies for design implementation and verification. Collaborate … team environment while also being self-directed. Nice-to-Haves Prior experience with High Level Synthesis (HLS) with Vivado. Knowledge of Embedded Software C++ (OOP). Experience with System Verilog Assertions (SVA). Familiarity with high-speed protocols (PCIe, TCP/IP, Ethernet). Experience with UVM-based verification environments. Knowledge of ARM-based SoC architectures. Master of Science in More ❯
treatments and testing. Ready to make your mark in the world of FPGA design? Apply now! Desired Skills and Experience FPGA Design, VHDL, Simulink, Xilinx, Intel, Microsemi devices, System Verilog, UVM test-bench, QuestaSim and ModelSim More ❯
treatments and testing. Ready to make your mark in the world of FPGA design? Apply now! Desired Skills and Experience FPGA Design, VHDL, Simulink, Xilinx, Intel, Microsemi devices, System Verilog, UVM test-bench, QuestaSim and ModelSim More ❯
MPSOC) AND/OR ASICs. • Additionally, S/He will be responsible for writing/debugging tests/sequences for End-to-End simulation on UVM framework, with System Verilog Assertions, and writing/debugging C++ based SW driven validation on SOC evaluation boards (Xilinx MPSOC) running Linux. Prefer skills: • High Level Synthesis (HLS) with Vivado, • Embedded SW C++ (OOP … and System Verilog Assertions (SVA) • Knowledge of high-speed protocols (PCIe, TCP/IP, Ethernet) • Deployed state-of-the-art EDA flows/methodologies including Synopsys DC/Primetime/Synplify, Xilinx/Intel/Microchip EDA including HLS, Mentor Questa family, VIPs for UVM, Clock Domain Crossing (CDC), Catapult (HLS). The ideal candidate will have: • Bachelor of Science More ❯
MPSOC) AND/OR ASICs. Additionally, S/He will be responsible for writing/debugging tests/sequences for End-to-End simulation on UVM framework, with System Verilog Assertions, and also writing/debugging C++ based SW driven validation on SOC evaluation boards (Xilinx MPSOC) running Linux. L3T has deployed state-of-the-art EDA flows/methodologies … Debug skills • Good verbal, written, and presentation skills • US Citizenship required A PLUS for prior experience with: • High Level Synthesis (HLS) with Vivado, • Embedded SW C++ (OOP) and System Verilog Assertions (SVA) • Knowledge of high-speed protocols (PCIe, TCP/IP, Ethernet More ❯
Luton, Bedfordshire, United Kingdom Hybrid / WFH Options
Leonardo UK Ltd
FPGA/Firmware delivery teams What we need from you What you really must have: Experience leading teams or managing packages of work. Design tools such as Xilinx, TCL, Verilog, System Verilog and UVM FPGA architectures such as Xilinx 7. Xilinx UltraScale; Intel (Altera) or Microsemi (Actel). Fast interfaces such as PCIe, Ethernet, and JESD is also required. Auto More ❯
field 10+ years' experience in complex SOCs Deep understanding of Subsystems, Memory Controllers, and memory architectures (e.g., SRAM, ROM, eFuse) Extensive experience with the Digital ASIC Flow, RTL design (Verilog), synthesis, timing closure, and debug methodologies (e.g., DFT, JTAG, Scan, BIST). Extensive knowledge of SOC architecture, setup/silicon bring-up, validation, and all associated processes. SOC design, system More ❯
back into the ASIC. Model algorithms and validate concepts in MATLAB/Simulink (or equivalent), ensuring functional equivalence through to gate‐level sign‐off. Own RTL development (SystemVerilog/Verilog/VHDL) including synthesis, static‐timing closure, formal and constrained‐random verification. Analyse power, performance and area (PPA); implement innovative techniques to achieve aggressive bandwidth‐per‐watt targets. Collaborate with More ❯
C Bonus/"nice-to-have" skills: Industry experience in RTL design/RTL coding/digital design/hardware design - for FPGA/ASIC (VHDL and/or Verilog, System verilog) Digital Verification (UVM/system verilog) OR Formal verification methods - Jasper Gold, C/system C Definition of complex architecture High-speed digital connectivity and protocols - Fabric, Serdes More ❯
design team (electrical engineers, systems engineers, and scientists) to implement and integrate FPGA designs and sensor systems. Analyze, design, simulate, and implement algorithms in hardware descriptor languages, HDL (VHDL, Verilog), based on MATLAB model(s). Analyze, design, and implement HDL test benches in hardware description languages, HDL (VHDL, Verilog), for code validation and validation against models. Analyze schematic diagrams More ❯
Cambridge, Cambridgeshire, United Kingdom Hybrid / WFH Options
Ecm Selection
UK office. Your CV will show your: Good degree in electronics or another technical subject from a top university Extensive experience developing complex and well-structured RTL in SystemVerilog, Verilog or VHDL, with particular attention to design approach and performance constraints And as a skilled FPGA Design Engineer you will also have, as your CV demonstrates: A strong understanding of More ❯
Verifying firmware designs Ensuring configuration management/keeping designs under revision control Providing progress reports Skills, Qualifications and Experience required: Mandatory Proven expertise of developing firmware using VHDL or Verilog Experienced with Mentor Graphics FPGA development tools including HDL Designer, ModelSim/Questa and Precision Familiar with Xilinx/Intel (Altera)/Microsemi (Actel) design flows (ISE, Vivado, Quartus) and More ❯
Commercial and business awareness Experience of working across the full life cycle Familiarity with latest FPGA device families and verification methodologies Proven expertise of developing FPGA using VHDL or Verilog Experienced with Mentor Graphics FPGA development tools including HDL Designer, ModelSim/Questa and Precision Familiar with Xilinx/Intel (Altera)/Microsemi (Actel) design flows (ISE, Vivado, Quartus) and More ❯
Edinburgh, Granton, City of Edinburgh, United Kingdom
Holt Executive
Commercial and business awareness Experience of working across the full life cycle Familiarity with latest FPGA device families and verification methodologies Proven expertise of developing FPGA using VHDL or Verilog Experienced with Mentor Graphics FPGA development tools including HDL Designer, ModelSim/Questa and Precision Familiar with Xilinx/Intel (Altera)/Microsemi (Actel) design flows (ISE, Vivado, Quartus) and More ❯
tools including Lint, CDC, Synthesis, Power analysis tools. Planning, reporting status and communicating progress against expectations. Required Competencies Effective communicator with strong technical presentation skills. RTL design in System Verilog and expert digital design knowledge. Able to work autonomously and demonstrate technical competency. Knowledge of DSP design for Audio signal processing. Knowledge of power reduction techniques (DVFS, power gating, DMA More ❯
tools including Lint, CDC, Synthesis, Power analysis tools. Planning, reporting status and communicating progress against expectations. Required Competencies Effective communicator with strong technical presentation skills. RTL design in System Verilog and expert digital design knowledge. Able to work autonomously and demonstrate technical competency. Knowledge of DSP design for Audio signal processing. Knowledge of power reduction techniques (DVFS, power gating, DMA More ❯
will be responsible for: - Hardware requirements capture and management. - Concept development for complex functions and systems. - FPGA design and analysis. - Experience in verification techniques using either VHDL or System Verilog/UVM. - Production of material for design reviews. - Development of test planning, integration and design verification. - Ensure that all firmware designs follow the company firmware process. - Experience using FPGA technologies More ❯
tools including Lint, CDC, Synthesis, Power analysis tools. Planning, reporting status and communicating progress against expectations. Required Competencies Effective communicator with strong technical presentation skills. RTL design in System Verilog and expert digital design knowledge. Able to work autonomously and demonstrate technical competency. Knowledge of DSP design for Audio signal processing. Knowledge of power reduction techniques (DVFS, power gating, DMA More ❯
RBR-Technologies is a small service-disabled veteran-owned information and technology business founded on the basic principle of delivering customer mission success. RBR-technologies prides itself on our commitment to mission success as exemplified by the trust our customers More ❯
Cambridge, Cambridgeshire, United Kingdom Hybrid / WFH Options
Arm Limited
cases and regression suites to improve verification efficiency and coverage. Required Skills and Experience: Solid understanding of SoC Verification (using C Testcases), hardware description and verification languages e.g. SystemVerilog, Verilog, VHDL. Understanding of Computer architecture, bus protocols (e.g., AXI, AHB), and peripherals. Experience with Tcl, Python or other scripting languages. "Nice To Have" Skills and Experience: Experience with ARM-based More ❯
Overview: We are seeking an experienced Hardware Engineer to support a project, specializing in FPGA design and development. The ideal candidate will have strong expertise in VHDL or Verilog HDL coding and simulation, along with experience using ModelSim and Xilinx tools. Key Responsibilities: Implement FPGA-based systems. Perform VHDL/Verilog coding, simulation, and verification using ModelSim. Utilize Xilinx tools … results, and technical findings. Qualifications: Bachelor's degree in Electrical Engineering, Computer Engineering, or a related field. Proven experience in FPGA design, simulation, and implementation. Proficiency in VHDL or Verilog HDL coding and ModelSim simulations. Hands-on experience with Xilinx tools (Vivado, ISE, etc.). Strong analytical and problem-solving skills. Nice to Have (Not Required): Experience with software languages More ❯
Gate Arrays (FPGAs) to join our team supporting mission-critical programs. The ideal candidate will have practical experience designing, coding, simulating, and implementing FPGA-based systems using VHDL or Verilog, as well as utilizing tools such as ModelSim and Xilinx development suites. Key Responsibilities: Design, implement, and test FPGA-based hardware solutions. Develop HDL code using VHDL or Verilog. Perform … processes and support technical reviews. Required Qualifications: Bachelor's degree in Electrical Engineering, Computer Engineering, or related field. Proven experience with FPGA design and development. Proficiency in VHDL or Verilog HDL. Experience with ModelSim for simulation and debugging. Familiarity with Xilinx tools for FPGA development. Strong problem-solving and debugging skills. Preferred Qualifications (Nice to Have): Familiarity with programming languages More ❯
Master's degree in Electronic Engineering or related field - 12+ years of digital ASIC verification experience - Practical experience and understanding of: - Requirement capture, verification planning and coverage closure - System Verilog and UVM test benches - Creation of UVM test benches - System Verilog assertions - Managing regression and debugging failures - Scripting languages (e.g. Perl/Python/TCL) - Team player with good oral More ❯
advanced Cyber/EW applications. Conduct research and development (R&D), prototyping, and system integration to support mission-critical defense projects. Develop and optimize digital logic designs using VHDL, Verilog, or SystemVerilog (C is a bonus). Work closely with hardware engineers, embedded software developers, and RF engineers to integrate FPGA designs into embedded systems. Perform simulation, synthesis, timing analysis … years of demonstrated experience in: Engineering Research & Development (R&D), Prototyping, Integration, Testing, and Fielding of military technology and systems in Cyber/EW programs. Proficient in VHDL, Verilog, or SystemVerilog. Experience with FPGA development tools (Xilinx Vivado, Intel Quartus, ModelSim). Strong debugging and troubleshooting skills for hardware integration. Knowledge of RF communications and signal processing is a plus. More ❯