8 of 8 FPGA Jobs in Northern Ireland

Title: Senior FPGA Engineer Description: We are hiring for our client who is seeking an experienced and innovative Senior FPGA Engineer to join their R&D team on site in Larne, Northern Ireland. This engagement offers a very competitive day rate and the opportunity to work on cutting-edge imaging … embedded systems. Please note: the Senior FPGA Engineer must attend site regularly to collaborate with the R&D team. Flexible working from home may be considered after a successful embedding period and subject to project needs. The successful Senior FPGA Engineer will lead end-to-end FPGA design and development. ...

recruiting an experienced Senior IP Design Engineer to join a leading technology programme delivering next-generation FPGA and Adaptive SoC solutions. This is a remote UK contract offering the opportunity to work on high-performance digital IP for cutting-edge systems. As a Senior IP Design Engineer, you will design ...

recruiting an experienced Senior IP Design Engineer to join a leading technology programme delivering next-generation FPGA and Adaptive SoC solutions. This is a remote UK contract offering the opportunity to work on high-performance digital IP for cutting-edge systems. As a Senior IP Design Engineer, you will design ...

Design Engineer – Contract – Remote (UK) We are recruiting an experienced Senior IP Design Engineer to join a leading technology programme delivering next-generation FPGA and Adaptive SoC solutions. This is a remote UK contract offering the opportunity to work on high-performance digital IP for cutting-edge systems. … Senior IP Design Engineer, you will design and implement SystemVerilog RTL, developing synthesis-ready IP targeting FPGA/Adaptive SoC platforms. You will own end-to-end design flow including RTL architecture, integration, timing closure, place-and-route (P&R), constraints and optimisation. The role focuses on high-speed digital ...

recruiting an experienced Senior IP Design Engineer to join a leading technology programme delivering next-generation FPGA and Adaptive SoC solutions. This is a remote UK contract offering the opportunity to work on high-performance digital IP for cutting-edge systems. As a Senior IP Design Engineer, you will design … implement SystemVerilog RTL , developing synthesis-ready IP targeting FPGA/Adaptive SoC platforms. You will own end-to-end design flow including RTL architecture, integration, timing closure, place-and-route (P&R), constraints and optimisation . The role focuses on high-speed digital interfaces such as 100Gb Ethernet, PCIe Gen5 ...

Role: Senior IP Design Engineer Location: Belfast Working Mode: Hybrid Contract Type: Inside IR35 Duration: 24 months Core Scope: Design high-performance IP targeting FPGA/Adaptive SoC technology using SystemVerilog RTL. Deliver synthesis-ready designs meeting timing and integration requirements. Key Skills: SystemVerilog RTL design 100Gb Ethernet, PCIe Gen5 … AMBA/AXI Deep understanding of FPGA/Adaptive SoC design flow including P&R and timing closure Vivado/Vitis expertise Python/Tcl Scripting Git & CI/CD experience If you are interested in this position and would like to learn more, please send through your ...

Design Engineer role for 6months rolling contract in Belfast. Job description: Role Title: Senior IP Design Engineer Core Scope: Design high-performance IP targeting FPGA/Adaptive SoC technology using SystemVerilog RTL. Deliver synthesis-ready designs meeting timing and integration requirements. Key Skills: SystemVerilog RTL design 100Gb Ethernet, PCIe Gen5 … AMBA/AXI Deep understanding of FPGA/Adaptive SoC design flow including P&R and timing closure Vivado/Vitis expertise Python/Tcl Scripting Git & CI/CD experience ...

coverage-driven verification Automate regressions using Python scripting Work within CI/CD environments and version control using Git Support ASIC/SoC/FPGA verification flows Essential Skills & Experience Strong experience as a Verification Engineer/ASIC Verification Engineer Proven UVM and class-based verification expertise Solid background … verification (FFT, FIR, signal processing) Python for automation and regression Experience with SoC/ASIC/FPGA environments Git version control Desirable MATLAB experience Exposure to Vivado/Vitis or adaptive SoC flows Contract role | Market rate | Remote working If youre a senior, hands-on verification engineer looking ...