23 of 23 PCIe Jobs in the East of England

TCL, Verilog, System Verilog and UVM. FPGA architectures such as Xilinx 7, Xilinx UltraScale; Intel (Altera) or Microsemi (Actel). Fast interfaces such as PCIe, Ethernet, and JESD is also required. Auto-generated code using model driven engineering using Matlab and Simulink tools. Derivation of detailed FPGA/Firmware requirements More ❯

TCL, Verilog, System Verilog and UVM FPGA architectures such as Xilinx 7. Xilinx UltraScale; Intel (Altera) or Microsemi (Actel). Fast interfaces such as PCIe, Ethernet, and JESD is also required. Auto-generated code using model driven engineering using Matlab and Simulink tools Derivation of detailed Firmware requirements and architecture More ❯

and UVM. Experience with FPGA architectures including Xilinx 7, Xilinx UltraScale, Intel (Altera), or Microsemi (Actel). Knowledge of high-speed interfaces such as PCIe, Ethernet, and JESD. Familiarity with auto-generated code using MATLAB/Simulink and model-driven design. Strong ability to derive firmware requirements and architecture from More ❯

latest AMD FPGAs, including Versal). Development and debug of FPGA VHDL code. Design, testing and validation of high-speed serial interfaces such as PCIe, Aurora, JESD, and Ethernet. Design of interfaces and control blocks for HW components such as ADC, DAC, I2C, SPI devices, PROMs, SDRAM. Design of supporting More ❯

Power aware and Clock Domain Crossing implementation. Experience in embedded operating systems, device drivers, microprocessor and embedded system hardware architectures. Experience verifying subsystems for PCIe, LPDDR, HBM, UCIe, Ethernet. Development and deployment of large SoCs on emulation platforms. In Return: We offer a competitive reward package including healthcare and wellness More ❯

Power aware and Clock Domain Crossing implementation Experience in embedded operating systems, device drivers, microprocessor and embedded system hardware architectures. Experience verifying subsystems for PCIe, LPDDR, HBM, UCIe, Ethernet Development and deployment of large SoCs on emulation platforms In Return: We offer a competitive reward package including healthcare and wellness More ❯

Power aware and Clock Domain Crossing implementation Experience in embedded operating systems, device drivers, microprocessor and embedded system hardware architectures. Experience verifying subsystems for PCIe, LPDDR, HBM, UCIe, Ethernet Development and deployment of large SoCs on emulation platforms In Return: We offer a competitive reward package including healthcare and wellness More ❯

Power aware and Clock Domain Crossing implementation Experience in embedded operating systems, device drivers, microprocessor and embedded system hardware architectures. Experience verifying subsystems for PCIe, LPDDR, HBM, UCIe, Ethernet Development and deployment of large SoCs on emulation platforms In Return: We offer a competitive reward package including healthcare and wellness More ❯

Power aware and Clock Domain Crossing implementation Experience in embedded operating systems, device drivers, microprocessor and embedded system hardware architectures. Experience verifying subsystems for PCIe, LPDDR, HBM, UCIe, Ethernet Development and deployment of large SoCs on emulation platforms In Return: We offer a competitive reward package including healthcare and wellness More ❯

Power aware and Clock Domain Crossing implementation Experience in embedded operating systems, device drivers, microprocessor and embedded system hardware architectures. Experience verifying subsystems for PCIe, LPDDR, HBM, UCIe, Ethernet Development and deployment of large SoCs on emulation platforms In Return: We offer a competitive reward package including healthcare and wellness More ❯

Power aware and Clock Domain Crossing implementation Experience in embedded operating systems, device drivers, microprocessor and embedded system hardware architectures. Experience verifying subsystems for PCIe, LPDDR, HBM, UCIe, Ethernet Development and deployment of large SoCs on emulation platforms In Return: We offer a competitive reward package including healthcare and wellness More ❯

Power aware and Clock Domain Crossing implementation Experience in embedded operating systems, device drivers, microprocessor and embedded system hardware architectures. Experience verifying subsystems for PCIe, LPDDR, HBM, UCIe, Ethernet Development and deployment of large SoCs on emulation platforms In Return: We offer a competitive reward package including healthcare and wellness More ❯

impact hardware and software architecture. Experience writing and reviewing architecture specifications, both for hardware and software. Experience with modern desktop and server ecosystems, including PCIe, Device Tree, ACPI, and UEFI. Experience with the RISC-V ISA and RISC-V software ecosystem. Experience working with RTL engineers and with RTL product More ❯

component engineering Ability to conduct design verification & qualification testing, test & debugging, and production support Knowledge of VPX system design and fast interfaces such as PCIe, Ethernet, and JESDC Proficiency in model-driven engineering using Matlab and Simulink tools Familiarity with Mentor design tools and a structured approach to electronic design More ❯

What We're Looking For Strong background in mixed-signal design involving ADCs, DACs, FPGAs, and SoCs. Experience in fast digital interfaces such as PCIe, Ethernet, and JESD204. Proficiency in electronic design, verification, and qualification testing. Experience with power electronics (AC/DC conversion), PCB design, and component engineering. Familiarity More ❯

System Verilog, and UVM. Work with FPGA architectures including Xilinx 7, Xilinx UltraScale, Intel (Altera), or Microsemi (Actel). Utilise fast interfaces such as PCIe, Ethernet, and JESD. Generate auto code using Matlab and Simulink tools. Derive detailed Firmware requirements and architecture from system requirements. Apply a structured approach to … and UVM. Strong knowledge of FPGA architectures like Xilinx 7, Xilinx UltraScale, Intel (Altera), or Microsemi (Actel). Proficiency in using fast interfaces like PCIe, Ethernet, and JESD. Capability in auto-generated code using model-driven engineering tools such as Matlab and Simulink. Understanding of firmware design approaches following standards More ❯

if you had some of the following: Domain experience in low noise analogue electronics and or power supplies. Experience of fast interfaces such as PCIe, Ethernet, and JESD. Model driven engineering using Matlab and Simulink tools. Experience in FPGAs, Micro-processors, Memory and other High speed digital technologies with a More ❯

if you had some of the following: Domain experience in low noise analogue electronics and or power supplies. Experience of fast interfaces such as PCIe, Ethernet, and JESDC. Model driven engineering using Matlab and Simulink tools. Experience in FPGAs, Micro-processors, Memory and other High speed digital technologies with a More ❯

architecture development PCB design, component engineering, Design verification & qualification testing, test & debugging, production support. VPX system design, Proven ability of fast interfaces such as PCIe, Ethernet, and JESDC, Model driven engineering using Matlab and Simulink tools, Mentor design tools, A structured approach to electronic design, Electronics test methods and equipment More ❯

produce outstanding systems! Responsibilities: As a creative verification engineer with a knowledge of SoC integration verification, SoC scenario verification, SoC performance verification, CHI/PCIe/CXL, DDRx/LPDDRx integration verification in SoC RTL. Your key responsibilities will include writing test plans, defining test methodologies, developing SystemVerilog/Verilog … DFT/DFD, Power Aware verification techniques Experience in embedded operating systems, device drivers, microprocessor and embedded system hardware architectures. Experience verifying subsystems for PCIe, LPDDR, HBM, UCIe, Ethernet Development and deployment of large SoCs on emulation platforms Automation experience with shell programming/scripting (g. Tcl, Perl, Python etc. More ❯

produce outstanding systems! Responsibilities: As a creative verification engineer with a knowledge of SoC integration verification, SoC scenario verification, SoC performance verification, CHI/PCIe/CXL, DDRx/LPDDRx integration verification in SoC RTL. Your key responsibilities will include writing test plans, defining test methodologies, developing SystemVerilog/Verilog … DFT/DFD, Power Aware verification techniques Experience in embedded operating systems, device drivers, microprocessor and embedded system hardware architectures. Experience verifying subsystems for PCIe, LPDDR, HBM, UCIe, Ethernet Development and deployment of large SoCs on emulation platforms Automation experience with shell programming/scripting (g. Tcl, Perl, Python etc. More ❯

produce outstanding systems! Responsibilities: As a creative verification engineer with a knowledge of SoC integration verification, SoC scenario verification, SoC performance verification, CHI/PCIe/CXL, DDRx/LPDDRx integration verification in SoC RTL. Your key responsibilities will include writing test plans, defining test methodologies, developing SystemVerilog/Verilog … DFT/DFD, Power Aware verification techniques Experience in embedded operating systems, device drivers, microprocessor and embedded system hardware architectures. Experience verifying subsystems for PCIe, LPDDR, HBM, UCIe, Ethernet Development and deployment of large SoCs on emulation platforms Automation experience with shell programming/scripting (g. Tcl, Perl, Python etc. More ❯

ARM CPU ISA architecture. Experience with full boot chain and bootloaders like U-Boot, GRUB, and UEFI. Knowledge of hardware protocols such as USB, PCIe, UART, I2C, SPI, and GPIO, as well as prior experience with Bluetooth and wireless technologies is a plus. Hands-on experience with embedded hardware and … source contributions to Linux kernel, userspace, or open source projects in general. Desirable Skills & Experience Familiarity with Qualcomm SoCs and Qualcomm Snapdragon internal architecture. PCIe or USB4 Experience. Linux DRM subsystem experience. Experience in enabling end-to-end solutions. Active Linux kernel developers or maintainers. Past Speaker at open source More ❯