18 of 18 Tcl Jobs in the East of England

experienced Firmware Engineer to work within an innovative team, delivering cutting-edge digital systems designed to meet complex future customer requirements. Key Responsibilities: Design and implement Firmware using Xilinx, TCL, Verilog, System Verilog, and UVM. Work with FPGA architectures including Xilinx 7, Xilinx UltraScale, Intel (Altera), or Microsemi (Actel). Utilise fast interfaces such as PCIe, Ethernet, and JESD. Generate More ❯

/h (Umbrella) Responsibilities : Artificial Intelligence, including machine learning and genetic algorithms Auto-generated code using model driven engineering using MATLAB and Simulink tools Design tools such as Xilinx, TCL, Verilog, System Verilog and UVM Derivation of detailed Firmware requirements and architecture from system requirements A structured approach to firmware design (RTCA DO-254 or similar) Experience required: FPGA architectures More ❯

analyses) or similar. Additional experience with radio frequency systems, DSP, embedded software and/or requirements management using DOORS would be beneficial. Further experience with C++, VHDL, Python and Tcl would be desirable. Due to the nature of projects, the role is mostly onsite, although occasional home working is possible when projects allow. In return, on offer is a competitive More ❯

Configuration Vectors etc. Programming and scripting languages, particularly writing and debugging Linux/Unix bash scripts is an advantage. Knowledge of a programming language such as C, Java, python, TCL, VBA would be useful but not essential. Competent in the use of various test equipment used for electrical measurements, e.g. DMM, oscilloscope, current probes, Data acquisition unit, data bus monitors More ❯

Engineers for contracts based in Luton, Bedfordshire. The Firmware Engineer will deliver Firmware for complex digital systems that meet challenging future customer requirements. Responsibilities Design tools such as Xilinx, TCL, Verilog, System Verilog and UVM FPGA architectures such as Xilinx 7. Xilinx UltraScale; Intel (Altera) or Microsemi (Actel). Fast interfaces such as PCIe, Ethernet, and JESD is also required. More ❯

and network administration (firewalls, local config) Knowledge of spacecraft/bus interfaces (MIL-1553, SpaceWire, CAN, RS232/422) Ability to write scripts/test sequences (e.g. Bash, Python, TCL, VBA, C/Java advantageous) Willingness to travel and support extended hours during campaigns More ❯

test sequences (CCS/ATP or similar) Strong spacecraft system awareness (TM/TC, MIL-1553, SpaceWire, FDIR, AOCS, power, thermal) Experience with C/Java/Python/TCL/VBA or bespoke test languages (e.g. Elisa) Comfortable with Linux/Windows test environments & standard electrical lab instruments Experience supporting environmental/launch test campaigns and NRBs/TRBs More ❯

Configuration Vectors etc. Programming and scripting languages, particularly writing and debugging Linux/Unix bash scripts is an advantage. Knowledge of a programming language such as C, Java, python, TCL, VBA would be useful but not essential. Competent in the use of various test equipment used for electrical measurements, e.g. DMM, oscilloscope, current probes, Data acquisition unit, data bus monitors More ❯

Engineers for contracts based in Luton, Bedfordshire. The Firmware Engineer will deliver Firmware for complex digital systems that meet challenging future customer requirements. Responsibilities Design tools such as Xilinx, TCL, Verilog, System Verilog and UVM FPGA architectures such as Xilinx 7 click apply for full job details More ❯

Engineers for contracts based in Luton, Bedfordshire. The Firmware Engineer will deliver Firmware for complex digital systems that meet challenging future customer requirements. Responsibilities Design tools such as Xilinx, TCL, Verilog, System Verilog and UVM FPGA architectures such as Xilinx 7. Xilinx UltraScale; Intel (Altera) or Microsemi (Actel). Fast interfaces s... More ❯

design, ideally including work at 7nm or below Practical knowledge of timing closure, clock tree design, physical verification, and sign-off processes Strong scripting/programming ability (e.g. Python, Tcl) Email - jordan.browne@ic-resources.com Tel - 01189073075 LinkedIn - https://www.linkedin.com/in/jordan-browne-b4a08b20b/ More ❯

design, ideally including work at 7nm or below Practical knowledge of timing closure, clock tree design, physical verification, and sign-off processes Strong scripting/programming ability (e.g. Python, Tcl) Email - jordan.browne@ic-resources.com Tel - 01189073075 LinkedIn - https://www.linkedin.com/in/jordan-browne-b4a08b20b/ More ❯

design, ideally including work at 7nm or below Practical knowledge of timing closure, clock tree design, physical verification, and sign-off processes Strong scripting/programming ability (e.g. Python, Tcl) Email - jordan.browne@ic-resources.com Tel - 01189073075 LinkedIn - https://www.linkedin.com/in/jordan-browne-b4a08b20b/ More ❯

test sequences/scripts for execution of spacecraft tests from the Central Checkout System (CCS) Spacecraft systems and subsystem technical knowledge Programming and scripting languages such asC, Java, python, TCL, VBA Knowledge of system testing & Verification The Benefits: Hourly rate circa £55 via Umbrella company Training and Development Does this sound like your next career move? Apply today. Working with More ❯

knowledge of synthesis, constraints development, timing closure, power intent, and verification of implementation flows. Hands-on experience with industry-standard tools for physical implementation and sign-off. Scripting ability (TCL/Make essential; Python/Verilog desirable). Email - jordan.browne@ic-resources.com Tel - 01189073075 LinkedIn - https://www.linkedin.com/in/jordan-browne-b4a08b20b/ More ❯

knowledge of synthesis, constraints development, timing closure, power intent, and verification of implementation flows. Hands-on experience with industry-standard tools for physical implementation and sign-off. Scripting ability (TCL/Make essential; Python/Verilog desirable). Email - jordan.browne@ic-resources.com Tel - 01189073075 LinkedIn - https://www.linkedin.com/in/jordan-browne-b4a08b20b/ More ❯

knowledge of synthesis, constraints development, timing closure, power intent, and verification of implementation flows. Hands-on experience with industry-standard tools for physical implementation and sign-off. Scripting ability (TCL/Make essential; Python/Verilog desirable). Email - jordan.browne@ic-resources.com Tel - 01189073075 LinkedIn - https://www.linkedin.com/in/jordan-browne-b4a08b20b/ More ❯

bring-up, and debug of HAPS-based setups Key skills: FPGA firmware development, experience in Interfaces such as SPI, I2C, UART, GPIO, Raspberry Pi, Test automation Scripting languages - Python, TCL 1 to 10 years of experience Strong experience in CPLD/FPGA firmware development using Verilog/SystemVerilog Proficiency in Scripting languages (eg, Python, TCL) for automation and debug Hands More ❯