Senior Physical Design (ASIC) Engineer
- Hiring Organisation
- Pragmatic Semiconductor
- Location
- Cambridge, Cambridgeshire, United Kingdom
- Salary
- £ 70 K
routeClock tree synthesis (CTS)Parasitic extractionStatic timing analysis (STA) and timing closureProven experience using industry-standard Electronic Design Automation (EDA) tools (e.g., Cadence, Synopsys, Siemens EDA)Ability to apply advanced engineering principles to solve complex technical problemsStrong written and verbal communication skillsAbility to work independently and collaboratively within multidisciplinary engineering ...