13 of 13 Synopsys Jobs in London

Proven experience with RTL design (IP or SoC level). Proficiency in performance optimisation, including power, area, and frequency trade-offs. Hands-on experience with ASIC design tools (e.g., Synopsys, Cadence, etc.). Desirable Experience Understanding of verification methodologies such as UVM or formal verification. Exposure to GPU, CPU, DSP, or FPU architecture and debug/test strategies. Experience with More ❯

Proven experience with RTL design (IP or SoC level). Proficiency in performance optimisation, including power, area, and frequency trade-offs. Hands-on experience with ASIC design tools (e.g., Synopsys, Cadence, etc.). Desirable Experience Understanding of verification methodologies such as UVM or formal verification. Exposure to GPU, CPU, DSP, or FPU architecture and debug/test strategies. Experience with More ❯

with RISC-V instruction set architecture (preferred) Understanding of graphics pipelines and/or neural network accelerators Awareness of physical design implications (DFT, timing, floorplanning) Proficiency with EDA tools (Synopsys, Cadence, Mentor, etc.) Strong scripting skills in Python, TCL, or similar BS/MS in Electrical Engineering, Computer Engineering, or related field Verification Requirements: 5+ years of experience in hardware More ❯

is a plus, not a must Understanding of pipelining, memory hierarchies, or parallel compute concepts Interest in learning physical design fundamentals (timing, DFT, floorplanning) Experience using EDA tools (e.g., Synopsys, Cadence, or similar) during academic or internship projects Scripting knowledge in Python, TCL, or equivalent languages BS or MS in Electrical Engineering, Computer Engineering, or a related discipline Verification Requirements More ❯

schematic (LVS), and other physical verification compliance. Collaborate with DFT engineers to integrate design-for-test (DFT) structures into the physical implementation. Utilise EDA tools such as Cadence Innovus, Synopsys ICC2, Mentor Graphics Calibre, and others. Interface with foundries and process engineers to ensure manufacturability and yield optimisation. Work closely with RTL and architecture teams to drive design feasibility, constraints More ❯

are internationally renowned researchers from UCL and Oxford University who have pioneered the development of qubits and quantum computing architectures. Our chairman is the co-founder of Cadence and Synopsys, the two leading companies in the area of Electronic Design Automation. We’re backed by a team of top-tier investors including Bosch Ventures, Porsche SE, Sony Innovation Fund, Oxford More ❯

are internationally renowned researchers from UCL and Oxford University who have pioneered the development of qubits and quantum computing architectures. Our chairman is the co-founder of Cadence and Synopsys, the two leading companies in the area of Electronic Design Automation. We're backed by a team of top-tier investors including Bosch Ventures, Porsche SE, Sony Innovation Fund, Oxford More ❯

are internationally renowned researchers from UCL and Oxford University who have pioneered the development of qubits and quantum computing architectures. Our chairman is the co-founder of Cadence and Synopsys, the two leading companies in the area of Electronic Design Automation. We’re backed by a team of top-tier investors including Bosch Ventures, Porsche SE, Sony Innovation Fund, Oxford More ❯

are internationally renowned researchers from UCL and Oxford University who have pioneered the development of qubits and quantum computing architectures. Our chairman is the co-founder of Cadence and Synopsys, the two leading companies in the area of Electronic Design Automation. We’re backed by a team of top-tier investors including Bosch Ventures, Porsche SE, Sony Innovation Fund, Oxford More ❯

are internationally renowned researchers from UCL and Oxford University who have pioneered the development of qubits and quantum computing architectures. Our chairman is the co-founder of Cadence and Synopsys, the two leading companies in the area of Electronic Design Automation. We’re backed by a team of top-tier investors including Bosch Ventures, Porsche SE, Sony Innovation Fund, Oxford More ❯

are internationally renowned researchers from UCL and Oxford University who have pioneered the development of qubits and quantum computing architectures. Our chairman is the co-founder of Cadence and Synopsys, the two leading companies in the area of Electronic Design Automation. We're backed by a team of top-tier investors including Bosch Ventures, Porsche SE, Sony Innovation Fund, Oxford More ❯

occasionally Go) to expose DevSecOps capabilities. Package and deploy services to OpenShift/Kubernetes clusters, ensuring scalability and high availability. DevSecOps Toolchain Integration Integrate with and extend APIs for Synopsys BlackDuck, Snyk, OWASP Dependency-Track, JFrog Artifactory, HashiCorp Vault/CyberArk, and more. Drive continuous improvement of our CI pipelines (Jenkins, TeamCity, Tekton), embedding security "shift-left" practices. Developer Enablement More ❯

IAST, RASP, CSPM, API Security, and more. Experience with at least one scripting language. Hands-on experience with AppScan or other application security products (Snyk, Checkmarx, Invicti, OpenText (Fortify), Synopsys, Sonatype, Imperva, F5, Burp Suite, etc.). Strong understanding of developer methodologies, DevOps trends, and best practices. Primary Products: AppScan AppScan on Cloud Travel Requirements: Up to 50% travel may More ❯