experience in software development, with a focus on C++ and/or Rust . Strong understanding of FPGA architectures , toolchains (e.g., Xilinx Vivado, Intel Quartus), and hardwaredescription languages ( VHDL/Verilog ). Experience with high-speed data centre and GPU interfaces (e.g., PCIe, Ethernet, Infiniband). More ❯
chip-level verification, including linting, synthesis, timing closure, CDC, RDC, and coverage analysis. Profile Essential Skills Degree in Computer Science, Engineering, or related field. Strong experience with SystemVerilog or VHDL . Competence in scripting (Python, Tcl). Knowledge of digital design flows. Processor design and application-specific blocks. High-speed serial interfaces & complex third-party IP integration. Arithmetic pipeline and More ❯
chip-level verification, including linting, synthesis, timing closure, CDC, RDC, and coverage analysis. Profile Essential Skills Degree in Computer Science, Engineering, or related field. Strong experience with SystemVerilog or VHDL . Competence in scripting (Python, Tcl). Knowledge of digital design flows. Processor design and application-specific blocks. High-speed serial interfaces & complex third-party IP integration. Arithmetic pipeline and More ❯
chip-level verification, including linting, synthesis, timing closure, CDC, RDC, and coverage analysis. Profile Essential Skills Degree in Computer Science, Engineering, or related field. Strong experience with SystemVerilog or VHDL . Competence in scripting (Python, Tcl). Knowledge of digital design flows. Processor design and application-specific blocks. High-speed serial interfaces & complex third-party IP integration. Arithmetic pipeline and More ❯
london (city of london), south east england, united kingdom
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chip-level verification, including linting, synthesis, timing closure, CDC, RDC, and coverage analysis. Profile Essential Skills Degree in Computer Science, Engineering, or related field. Strong experience with SystemVerilog or VHDL . Competence in scripting (Python, Tcl). Knowledge of digital design flows. Processor design and application-specific blocks. High-speed serial interfaces & complex third-party IP integration. Arithmetic pipeline and More ❯
ll be part of a collaborative, close-knit R&D group , where your technical input genuinely shapes product innovation. What You’ll Do Lead FPGA design and development in VHDL or Verilog , from architecture through verification and test Work with ADC/DAC-based signal processing and high-speed data paths Implement and optimize communication interfaces SPI, I2C, UART, RS … Contribute to continuous improvement of design flows and methodologies What You’ll Bring 4+ years of FPGA design experience in a commercial or R&D environment Proven skills in VHDL or Verilog for FPGA development Solid understanding of signal-processing architectures and high-speed serial interfaces Experience integrating with embedded processors and digital communication protocols Degree in Electronics, Electrical Engineering More ❯
