1 to 25 of 69 Verilog Jobs in the South West

Power analysis tools. Planning, reporting status and communicating progress against expectations. Required Competencies Effective communicator with strong technical presentation skills. RTL design in System Verilog and expert digital design knowledge. Able to work autonomously and demonstrate technical competency. Knowledge of DSP design for Audio signal processing. Knowledge of power reduction More ❯

Power analysis tools. Planning, reporting status and communicating progress against expectations. Required Competencies Effective communicator with strong technical presentation skills. RTL design in System Verilog and expert digital design knowledge. Able to work autonomously and demonstrate technical competency. Knowledge of DSP design for Audio signal processing. Knowledge of power reduction More ❯

knowledge of RTL synthesis, performance, and power analysis. In-depth understanding of digital design concepts and problem-solving capabilities. Proficient in HDL coding (VHDL, Verilog, SystemVerilog). System design knowledge, including clock domain management, reset schemes, and power management. Experience with SoC level verification (HW/SW co-verification, multi More ❯

architectures and design implementations using VHDL, Simulink, etc., targeting Xilinx, Intel, and Microsemi devices. Ability to verify complex FPGA implementations using VHDL and System Verilog/UVM test-bench methodologies. Proficiency in FPGA design toolsets and Mentor verification tools (QuestaSim & ModelSim). Strong skills in generating low-level software (C More ❯

an FPGA Engineer who enjoys hands-on innovation and working across multidisciplinary challenges. Key Skills and Requirements: Experience in FPGA firmware development (VHDL/Verilog) using toolchains such as Vivado or Quartus. Proven track record of design and implementation of complex systems. Strong academic background with a relevant engineering or More ❯

planning , functional coverage , code coverage , unit-level verification , and top-level verification . Expertise in testbench architecture design and hands-on experience with System Verilog , UVM , ABV , and constrained random verification . Experience with PSL , SVA , e , VMM , OVM . Familiarity with formal verification techniques such as model checking , CDC More ❯

planning , functional coverage , code coverage , unit-level verification , and top-level verification . Expertise in testbench architecture design and hands-on experience with System Verilog , UVM , ABV , and constrained random verification . Experience with PSL , SVA , e , VMM , OVM . Familiarity with formal verification techniques such as model checking , CDC More ❯

planning , functional coverage , code coverage , unit-level verification , and top-level verification . Expertise in testbench architecture design and hands-on experience with System Verilog , UVM , ABV , and constrained random verification . Experience with PSL , SVA , e , VMM , OVM . Familiarity with formal verification techniques such as model checking , CDC More ❯

planning , functional coverage , code coverage , unit-level verification , and top-level verification . Expertise in testbench architecture design and hands-on experience with System Verilog , UVM , ABV , and constrained random verification . Experience with PSL , SVA , e , VMM , OVM . Familiarity with formal verification techniques such as model checking , CDC More ❯

techniques Candidates must be willing and eligible to go through high level security clearance checks Desirable Skills: Experience with FPGAs (e.g. RFSoC), VHDL/Verilog Familiarity with Linux, GitLab, and collaborative DevOps environments Prior work in defence, intelligence, or covert communications systems O.K. I'm in what's next? Apply More ❯

considerations in hardware design. Experience using PCIe, CXL, RDMA, DDR4, bare metal use of high-speed transceivers, Ethernet, IP. Excellent skills in SystemVerilog/Verilog/VHDL. The company offer an excellent salary, along with a bonus up to 85%, flexible and hybrid working, exciting technology and a great team More ❯

techniques Candidates must be willing and eligible to go through high level security clearance checks Desirable Skills: Experience with FPGAs (e.g. RFSoC), VHDL/Verilog Familiarity with Linux, GitLab, and collaborative DevOps environments Prior work in defence, intelligence, or covert communications systems O.K. I'm in what's next? Apply More ❯

Master's or PhD preferred). Proven experience in analog and digital IC design, including physical design considerations and verification. Proficient in VHDL/Verilog and system-level modelling. Strong scripting skills (Python, MATLAB) and comfortable working in Linux-based design environments. Excellent communication and leadership skills, with the ability More ❯

testing and performance evaluation of RF systems. Experience with GnuRadio or similar SDR platforms. FPGA/RFSOC development experience and proficiency in VHDL or Verilog Familiarity with Linux environments, version control systems (e.g., GitLab), and collaborative development tools. Experience with payload development for defence or covert communications systems. PLEASE NOTE More ❯

testing and performance evaluation of RF systems. Experience with GnuRadio or similar SDR platforms. FPGA/RFSOC development experience and proficiency in VHDL or Verilog Familiarity with Linux environments, version control systems (e.g., GitLab), and collaborative development tools. Experience with payload development for defence or covert communications systems. PLEASE NOTE More ❯

Ensure designs meet relevant performance, timing, and reliability criteria for deployment in defence applications. Essential Experience: Proven commercial experience in FPGA design (VHDL or Verilog). Strong understanding of FPGA toolchains, preferably Xilinx (Vivado/ISE) or Intel (Quartus). Familiarity with simulation, synthesis, and timing analysis tools. Experience working More ❯

learning teams to develop low-latency, high-throughput applications. Required skills and experience: FPGA design, development, and testing experience Proficiency in SystemVerilog, VHDL, or Verilog Programming skills in C/C++ or Python Experience with Quartus and/or Vivado tools Knowledge of low latency, machine learning, or neural network More ❯

They are looking for an FPGA Engineer with the following experience: FPGA Design and Development. DSP Experience in an FPGA Environment. Experience in VHDL, Verilog and SystemVerilog. Software Design in C, C++ or Python. Knowledge of Sonar, Radar or other sensor systems. High Level Synthesis (HLS) experience. If you are More ❯

high-throughput applications. What skills and experience is required: FPGA Design, development and testing experience Previous experience in using SystemVerilog, VHDL and/or Verilog Software skills using C/C++ or Python Exposure to Quartus and/or Vivado Any exposure or understanding of low latency, machine learning, or More ❯

in hardware design. Experience using PCIe, CXL, RDMA, DDR4, bare metal use of high-speed transceivers, Ethernet, IP. Good experience in FPGA, SystemVerilog/Verilog/VHDL. The company offer an excellent salary, along with a bonus up to 85%, flexible and hybrid working, exciting technology and a great team More ❯

in hardware design. Experience using PCIe, CXL, RDMA, DDR4, bare metal use of high-speed transceivers, Ethernet, IP. Good experience in FPGA, SystemVerilog/Verilog/VHDL. The company offer an excellent salary, along with a bonus up to 85%, flexible and hybrid working, exciting technology and a great team More ❯

high-throughput applications. What skills and experience is required: FPGA Design, development and testing experience Previous experience in using SystemVerilog, VHDL and/or Verilog Software skills using C/C++ or Python Exposure to Quartus and/or Vivado Any exposure or understanding of low latency, machine learning, or More ❯

high-throughput applications. What skills and experience is required: FPGA Design, development and testing experience Previous experience in using SystemVerilog, VHDL and/or Verilog Software skills using C/C++ or Python Exposure to Quartus and/or Vivado Any exposure or understanding of low latency, machine learning, or More ❯

high-throughput applications. What skills and experience is required: FPGA Design, development and testing experience Previous experience in using SystemVerilog, VHDL and/or Verilog Software skills using C/C++ or Python Exposure to Quartus and/or Vivado Any exposure or understanding of low latency, machine learning, or More ❯

firmware designs follow established processes. Required Skills and Experience: • Experience in design techniques using VHDL. • Experience in verification techniques using either VHDL or System Verilog/UVM. • Experience in specifying timing and area constraints for efficient FPGA place and route. • Ability to analyze system-level requirements and derive detailed firmware More ❯