14 of 14 Verilog Jobs in the Thames Valley

systems. Able to work effectively in multidisciplinary hardware, software, and physics teams. Desirable Core Requirements FPGA development experience using VHDL or Verilog on Xilinx FPGAs. Experience with high-throughput data acquisition, streaming, buffering, and multi-core processing. Experience developing RF sensing, timing, synchronisation, or signal-processing systems. Experience with networked ...

Staff FPGA Engineer with the following background: 10+ years of hands-on FPGA development experience Strong RTL design and verification using SystemVerilog, Verilog, or VHDL Extensive FPGA-based DSP experience, including DDC/DUC, DDS and FIR/IIR filtering Experience with Xilinx UltraScale+ MPSoC platforms Modelling and simulation using ...

software. Collaborate with multidisciplinary teams to deliver next-generation quantum technologies. What We’re Looking For: Strong experience in FPGA programming (VHDL/Verilog/SystemVerilog) and DSP implementation. Knowledge of digital and RF hardware, with hands-on experience in embedded systems. Experience with standard hardware interfaces (I2C, SPI, UART ...

decoder development or integration. • Low-latency H.265/HEVC or H.264 implementation. • FPGA/SoC platforms and associated development tools. • FPGA integration, AXI, DMA, Verilog or VHDL. • SDI video, 4K60, 10-bit processing, embedded audio, genlock or timecode. • GStreamer or comparable embedded media frameworks. • Experience with camera-control protocols, telemetry ...

advanced digital designs in Milton Keynes, Buckinghamshire. This 6-month on-site contract requires DO-254 exposure and FPGA experience with Lattice Diamond, VHDL, Verilog or SystemVerilog; SC clearance is required or obtainable. Ideal for engineers seeking a short-term assignment with the chance to contribute to complex electronics ...

Keynes, Buckinghamshire: Experience working with in a DO-254 environment Experience working with Lattice Diamond FPGAs Experience working with more than one language - VHDL, Verilog, SystemVerilog The successful Candidate must currently hold or be able to obtain SC Clearance. #J-18808-Ljbffr ...

will drive the full lifecycle from requirements to RTL implementation, lab validation, and product release. The role requires hands-on experience with SystemVerilog/Verilog, AMD/Xilinx toolchains, and high-speed interfaces like PCIe/DMA. You will mentor mid/senior hardware engineers and champion CI/ ...

signal processing and control functions across RTL design, verification, modeling, hardware testing and debugging. The role requires 10+ years FPGA experience, strong SystemVerilog/Verilog/VHDL RTL skills, DSP expertise (DDC/DUC, DDS, FIR/IIR), Xilinx MPSoC familiarity, and hands-on debugging with lab equipment. #J ...

will build and maintain the model of the chip that the whole team simulates against, a mixed‐abstraction model combining transistor‐level circuits with Verilog‐A/Verilog‐AMS and SystemVerilog real‐number behavioural blocks. These models will be derived from first‐principles mathematics and correlated against schematic and measured … level integration: define block interfaces and specifications, assemble the top level, and run the full‐chip mixed‐signal simulations that verify the ASIC Develop Verilog‐A and Verilog‐AMS models of analog blocks and assemble them into a simulatable full chip Build real‐number models so the full chip runs ...

FPGA engineer to translate probabilistic models into high-performance RTL and integrate with analogue front ends. You will design from scratch in VHDL/Verilog, work with PS/PL architectures, and ensure timing closure across clock domains. Strong HDL, lab debug, and FPGA toolchain experience are essential. This role ...

project planning and technical documentation. What We're Looking For Commercial experience in FPGA design and verification within complex hardware environments. Experience with System Verilog, and/or VHDL. Expert-level proficiency in Verilog and deep understanding of FPGA architectures. Strong experience achieving timing closure on high-utilization FPGA designs ...

integrate cleanly into end-to-end robotics solutions. Key Responsibilities FPGA IP Design & Architecture Design, implement, and optimize high-performance soft IP in Verilog/SystemVerilog for robotics and industrial solutions Define and maintain low-level HAL/driver APIs that expose IP capabilities to embedded and host software Develop …/MSc (or equivalent) in Electrical/Electronic Engineering (EEE), Computer Engineering, Computer Science, or a related discipline Strong production experience in RTL design (Verilog and/or SystemVerilog) targeting FPGAs Hands-on experience with RTL verification and simulation (e.g. ModelSim/Questa, VCS, or equivalent) Proven ability to close ...

equipment. Ensure all FPGA designs achieve required level of timing closure and functional performance before release. Code reviews of existing and new VHDL/Verilog files. Working alongside a team comprising of electronic, mechanical and software design engineers in the creation of high performing and cost-effective solutions. Ensuring designs … from early conceptual studies through to manufacturing support post-release. Required Skills, Knowledge and Expertise Strong demonstrable experience in VHDL including implementation of algorithms. Verilog experience an advantage. Experience in compilation timing closure is essential. Working knowledge of interface standards such as LVDS, PCIE, GMII etc Skilled in testbench generation ...

product release. Key Responsibilities: System Architecture: Lead FPGA subsystem architecture for complex data platforms. RTL & Verification: Design/verify digital RTL (SystemVerilog/Verilog) using AMD/Xilinx toolchains. Optimization: Maximize throughput, power efficiency, resource usage, and timing closure. Integration: Collaborate with ASIC, FW, and SW teams to support board … mentor mid/senior hardware engineers. What We Need: Proven full-lifecycle FPGA design experience (architecture to hardware bring-up). Strong SystemVerilog/Verilog skills with AMD/Xilinx toolchains (Vivado/Questa). Hands-on experience with high-speed interfaces (PCIe/DMA) and lab debugging tools. Scripting ...