10 of 10 Xilinx Jobs in Scotland

FPGA design experience using VHDL and/or Verilog. Experience with Mentor Graphics tools, including HDL Designer, ModelSim/Questa and Precision. Knowledge of Xilinx, Intel/Altera or Microsemi/Actel design flows, including ISE, Vivado and Quartus. Experience specifying timing and area constraints for FPGA place and route. ...

Critical Systems domains. Proven expertise in FPGA development , including VHDL coding , synthesis , timing closure , and simulation . Proficiency with FPGA development tools such as Xilinx Vivado , Intel Quartus , or Mentor ModelSim . Experience across the full firmware lifecycle — from requirements capture through to design validation and verification. Strong understanding ...

requirements. Experience in firmware design techniques and tools, from VHDL to place-and-route. Experience in FPGA architectures such as system-on-chip (e.g. Xilinx Versal). Experience in specifying timing and area constraints for efficient FPGA place and route. Experience in integrating and debugging complex systems where the Firmware ...

detailed FW requirements.Experience in firmware design techniques and tools, from VHDL to place-and-route.Experience in FPGA architectures such as system-on-chip (e.g. Xilinx Versal).Experience in specifying timing and area constraints for efficient FPGA place and route.Experience in integrating and debugging complex systems where the Firmware interacts with ...

Coordinate technical activities with engineering leads and other disciplines Experience with Mentor Graphics tools, including HDL Designer, ModelSim/Questa and Precision Familiarity with Xilinx, Intel (Altera) and/or Microsemi (Actel) design flows, including Vivado, Quartus and ISE Experience with timing/area constraints, synthesis and Place & Route Experience ...

essential, knowledge of Verilog an advantage but not essential.* Implementing high speed, multi-frequency clocking architectures* Design with FPGA technologies from either AMD(Xilinx), Intel (Altera) or Microsemi (Actel).* Use of Xilinx Vivado or Altera Quartus II/Quartus Prime is an advantage* Experience of FPGA architectures such … system-on-chip (e.g. Xilinx Versal) an advantage.* Experience in the use of Vendor IP e.g. Ethernet, Gigabit-transceivers, DDR interfaces etc.* Knowledge of Version management using Subversion, GIT or CVS* Specifying timing and area constraints for efficient FPGA place and route.* Familiarity with Mentor Graphics FPGA development tools including ...

Degree qualified (or equivalent)4+ years of relevant industry experienceExperience with EDA tools for simulation and synthesis, such as Mentor Graphics ModelSim, Altera Quartus, Xilinx Vivado, Synopsys DC, or Cadence GenusExperience with AXI interfacingExperience with timing and hardware resource optimisation for high-throughput data or signal-processing applicationsExperience using ...

design reviews. Experience in firmware design techniques and tools, from VHDL to place-and-route. Experience FPGA architectures such as system-on-chip (e.g. Xilinx Versal). Experience in specifying timing and area constraints for efficient FPGA place and route. Good verbal and written communication skills. Experience of working ...

translate system requirements into FPGA implementations. The role requires hands-on VHDL/Verilog development, experience with Mentor Graphics tools, and familiarity with Xilinx/Altera/Microsemi flows in safety-critical environments. On-site 3 days per week with SC eligibility. #J-18808-Ljbffr ...

developing FPGA using VHDL or Verilog Experienced with Mentor Graphics FPGA development tools including HDL Designer, ModelSim/Questa and Precision Familiar with Xilinx/Intel (Altera)/Microsemi (Actel) design flows (ISE, Vivado, Quartus) and third-party synthesis toolsExperience in specifying timing and area constraints for efficient FPGA Place … developing FPGA using VHDL or Verilog Experienced with Mentor Graphics FPGA development tools including HDL Designer, ModelSim/Questa and Precision Familiar with Xilinx/Intel (Altera)/Microsemi (Actel) design flows (ISE, Vivado, Quartus) and third-party synthesis toolsExperience in specifying timing and area constraints for efficient FPGA Place ...