Verification Engineer
Cambridge, Cambridgeshire, England, United Kingdom
Hybrid / WFH Options
Hybrid / WFH Options
MicroTECH Global Ltd
/hardware boundaries Proficient in: SystemVerilogPython, C++Linux environments Desirable Skills:UVM (Universal Verification Methodology)SVA (SystemVerilog Assertions) Assembly language familiarityExperience with toolchains such as LLVM or GCCDVCS tools (e.g., Git)Experience with job schedulers (SGE or similar DRMS)XML/XPath/XSLTWeb technologies: HTML/DOM, JavaScript, SQL Working Pattern:Hybrid working: 3 days onsite in Cambridge or More ❯
Employment Type: Contractor
Rate: Salary negotiable
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