SC Cleated FPGA Engineer
- Hiring Organisation
- Experis
- Location
- London, United Kingdom
- Employment Type
- Contract
- Contract Rate
- £550 - £650 per day
doing: Design, implement and verify custom FPGA IP modules, DSP pipelines and high-speed communications interfaces using VHDL or Verilog/SystemVerilog in AMD/Xilinx Vivado Lead SoC hardware/software co-design by configuring and integrating the Processing System (PS) and Programmable Logic (PL) on Zynq UltraScale+ devices … with Vivado Design Suite, IP Integrator and simulation workflows (e.g., ModelSim, Questa or Vivado Simulator) Solid HDL capability across VHDL, Verilog and/or SystemVerilog Demonstrable experience with Yocto (BitBake, recipe creation, layer management) or PetaLinux for building custom Linux distributions Strong C/C++ skills for Linux kernel-space ...