2 of 2 Contract UVM Jobs in London

verification environments for high-performance controller technologies, contributing across the full verification lifecycle from planning through to debug and closure. Key responsibilities include: Developing UVM/SystemVerilog based verification environments Creating and executing new verification test cases from scratch Verification of complex HPC protocols and controllers Debugging complex verification issues … Supporting coverage closure and verification sign-off activities Collaborating with wider design and verification teams Required Experience Minimum 8 years’ Design Verification experience Strong UVM and SystemVerilog expertise Experience verifying one or more of: PCIe CXL DDR/LPDDR High-Speed Ethernet AMBA peripherals Strong debugging and problem-solving capability ...

Citizens) My client has an urgent request for a number of design verification. Prerequisites: This is for individual contributor (IC) role. Solid background on UVM/SV, Experience in any of the complex HPC protocols (PCIe/DDR/LPDDR/Ethernet). Knowledge on the usage of protocol VIPs. … . Job Description: For PCIe Controller verification, DDR/LPDDR Controller verification, UAL Controller verification and AMBA Peripheral Verification: Looking for Solid background on UVM/SV, Protocols: PCie (gen7 etc), CXL, High Speed Ethernet, DDR/LPDDR Experience in complex HPC protocols, using protocol VIPs, Ability to define ...