3 of 3 Contract Adaptive Web Design Jobs in the UK excluding London

Senior IP Design Engineer

Hiring Organisation
DCV Technologies
Location
Belfast, City of Belfast, County Antrim, United Kingdom
Employment Type
Contract
Contract Rate
£35 - £60/hour
Senior IP Design Engineer – Contract – Remote (UK) We are recruiting an experienced Senior IP Design Engineer to join a leading technology programme delivering next-generation FPGA and Adaptive SoC solutions. This is a remote UK contract offering the opportunity to work on high-performance digital … cutting-edge systems. As a Senior IP Design Engineer, you will design and implement SystemVerilog RTL, developing synthesis-ready IP targeting FPGA/Adaptive SoC platforms. You will own end-to-end design flow including RTL architecture, integration, timing closure, place-and-route (P&R), constraints ...

Senior IP Design Engineer Contract Remote (UK)

Hiring Organisation
DCV Technologies Limited
Location
Belfast, County Antrim, Northern Ireland, United Kingdom
Employment Type
Contract, Work From Home
Contract Rate
From £35 to £60 per hour
recruiting an experienced Senior IP Design Engineer to join a leading technology programme delivering next-generation FPGA and Adaptive SoC solutions. This is a remote UK contract offering the opportunity to work on high-performance digital IP for cutting-edge systems. As a Senior IP Design Engineer … will design and implement SystemVerilog RTL , developing synthesis-ready IP targeting FPGA/Adaptive SoC platforms. You will own end-to-end design flow including RTL architecture, integration, timing closure, place-and-route (P&R), constraints and optimisation . The role focuses on high-speed digital interfaces ...

CPU Research Engineer

Hiring Organisation
Microtech Global Ltd
Location
Cambridgeshire, East Anglia, United Kingdom
Employment Type
Contract
Responsibilities: Research and develop next-generation data prefetching techniques including ML-based predictors and irregular access pattern prediction. Design advanced speculative execution mechanisms and thread-level speculation (TLS). Research branch prediction innovations including neural branch predictors, path-based prediction, slice-based prediction, and conditional control flow slice techniques. … Design ISA extensions and microarchitectural support for compiler-directed optimizations including software pipelining and instruction scheduling hints. Propose microarchitectural support for JIT compilation, dynamic optimization, and adaptive execution. Design simulation and prototyping frameworks integrating compiler toolchains with architectural models for microarchitectural evaluation. Participate in joint research projects ...