of material for design reviews. - Development of test planning, integration and design verification. - Ensure that all firmware designs follow the company firmware process. - Experience using FPGA technologies from either Xilinx, Intel (Altera) or Microsemi (Actel) and their tools. - Degree (BSc, BEng, MEng, MSc, PhD, EngD) in Electrical & Electronic Engineering (preferable) or related science (e.g. Physics). SC clearance is essential More ❯
communication and leadership skills Experience of developing FPGA using VHDL or Verilog Experienced with Mentor Graphics FPGA development tools, including HDL Designer, ModelSim/Questa, and Precision Familiarity with Xilinx/Intel (Altera)/Microsemi (Actel) design flows and third-party synthesis tools Experience in specifying timing and area constraints for efficient FPGA place and route Independent verification using VHDL More ❯
communication and leadership skills Experience of developing FPGA using VHDL or Verilog Experienced with Mentor Graphics FPGA development tools, including HDL Designer, ModelSim/Questa, and Precision Familiarity with Xilinx/Intel (Altera)/Microsemi (Actel) design flows and third-party synthesis tools Experience in specifying timing and area constraints for efficient FPGA place and route Independent verification using VHDL More ❯
communication and leadership skills Experience of developing FPGA using VHDL or Verilog Experienced with Mentor Graphics FPGA development tools, including HDL Designer, ModelSim/Questa, and Precision Familiarity with Xilinx/Intel (Altera)/Microsemi (Actel) design flows and third-party synthesis tools Experience in specifying timing and area constraints for efficient FPGA place and route Independent verification using VHDL More ❯
communication and leadership skills Experience of developing FPGA using VHDL or Verilog Experienced with Mentor Graphics FPGA development tools, including HDL Designer, ModelSim/Questa, and Precision Familiarity with Xilinx/Intel (Altera)/Microsemi (Actel) design flows and third-party synthesis tools Experience in specifying timing and area constraints for efficient FPGA place and route Independent verification using VHDL More ❯
Qualifications and Experience required: Experience of developing FPGA using VHDL or Verilog Experienced with Mentor Graphics FPGA development tools including HDL Designer, ModelSim/Questa and Precision Familiar with Xilinx/Intel (Altera)/Microsemi (Actel) design flows (ISE, Vivado, Quartus) and third-party synthesis tools Experience in specifying timing and area constraints for efficient FPGA Place and Route. Ability More ❯
for design reviews. Planning and executing test, integration, and design verification activities. Ensuring all firmware designs comply with internal development processes. Working with FPGA technologies from vendors such as Xilinx, Intel (Altera), or Microsemi (Actel), including their associated toolchains. Holding a degree (BSc, BEng, MEng, MSc, PhD, or EngD) in Electrical & Electronic Engineering or a related scientific discipline (e.g., Physics More ❯
for design reviews. Planning and executing test, integration, and design verification activities. Ensuring all firmware designs comply with internal development processes. Working with FPGA technologies from vendors such as Xilinx, Intel (Altera), or Microsemi (Actel), including their associated toolchains. Holding a degree (BSc, BEng, MEng, MSc, PhD, or EngD) in Electrical & Electronic Engineering or a related scientific discipline (e.g., Physics More ❯
requirements in DOORS Designing firmware architectures and low-level specs Writing VHDL/Verilog in Sigasi Studio Running simulations in QuestaSIM Doing synthesis, place & route, and timing analysis (Synplify, Xilinx FPGAs) Automating workflows with Python Supporting CI/CD pipelines and using GIT for version control Feeding into process improvements and helping streamline delivery What they’re after: Solid background More ❯
Cambridge, Cambridgeshire, England, United Kingdom
Avanti
the ground running and looking to start ASAP. At least twice a week in the office. Required: FPGA design with at least one of VHDL/Verilog/Systemverilog Xilinx ISE toolchain experience Telecommunications background preferred Please apply your latest CV if you have the above experience. More ❯
the ground running and looking to start ASAP. At least twice a week in the office. Required: FPGA design with at least one of VHDL/Verilog/Systemverilog Xilinx ISE toolchain experience Telecommunications background preferred Please apply your latest CV if you have the above experience. More ❯
