16 of 16 Permanent SystemVerilog Jobs

communication and interpersonal skills. Desirable Extras: Background in safety-critical FPGA development (e.g., RTCA/DO-254 DAL A or B). Familiarity with SystemVerilog/UVM for verification. Prior experience in Aerospace or Defence sectors. Knowledge of embedded processor cores such as ARM within FPGA architectures. Experience incorporating ...

software and infrastructure teams to optimise full-stack performance. Requirements: 7+ years FPGA/RTL design experience in timing-critical systems. Strong background in SystemVerilog, synthesis, timing closure and verification. Hands-on with Vivado/Quartus or equivalent toolchains. Familiarity with AXI, PCIe, Ethernet or custom high-speed interfaces. Bonus ...

system architecture and documentation. Skills & Experience Field Programmable Gate Arrays and digital signal processing Proven experience in FPGA design (VHDL/Verilog/SystemVerilog). Strong background in DSP implementation and digital transceiver design. Solid understanding of digital and RF hardware principles. Familiarity with AXI bus architectures and software-controlled ...

challenges. Desirable Skills (Useful but not required - ideal for more experienced applicants) Experience with Vivado, Libero, or additional Quartus tool chains. Knowledge of Verilog, SystemVerilog, or cryptographic algorithms. Exposure to UVM/OSVVM or Assertion Based Verification. Understanding of networking protocols (Layer 2/3), USB 3.2, or NVMe. Background ...

test) Strong background in Digital Signal Processing (DSP) design and optimisation Excellent academic background with a degree from a top university Proficiency in SystemVerilog or VHDL Proven ability to take technical ownership, collaborate effectively, and deliver complex projects Position: Senior FPGA Engineer Location: Cambridge Salary: £70k–£120k + equity ...

high-integrity engineering domains. Strong communication skills and ability to work within structured engineering processes. Technical Knowledge Beneficial to the Role VHDL , Verilog or SystemVerilog for digital design and implementation. Verification testbench architecture using SystemVerilog or C++ . Advanced verification methodologies such as OSVVM , UVVM or advanced VHDL verification techniques. ...

Overview Client: Our client a leading Multinational Semiconductor Telecom Company requires Senior FPGA/Firmware Engineer for position based in Cork City, Ireland. This opportunity requires the candidate to be onsite 5 days per week. ...

/DACs. Support test and lab evaluation using signal generators, spectrum analysers, and oscilloscopes. Lead or contribute to the implementation of designs using VHDL, SystemVerilog, and MATLAB/Simulink HDL Coder. Develop C/C++ software for deployment to embedded systems Use industry-standard tools such as Vivado, Quartus … signal generators and logic analysers) Desirable Experience Experience working with embedded Linux, bare-metal C drivers, or FPGA-based system integration Proficiency in VHDL, SystemVerilog, and embedded C for FPGA-host integration, control, and testing Familiarity with AXI interfaces, memory interfaces, JESD204B/C, or high-speed ADC/ ...

Bristol Are you an experienced FPGA Designer who enjoys contributing to the development of complex FPGA platforms? Look no further! Join our ambitious team at MBDA and be part of a company that is at ...

Stevenage Are you an experienced FPGA Designer who enjoys contributing to the development of complex FPGA platforms? Look no further! Join our ambitious team at MBDA and be part of a company that is at ...

Bolton Are you an experienced FPGA Designer who enjoys contributing to the development of complex FPGA platforms? Look no further! Join our ambitious team at MBDA and be part of a company that is at ...

opportunity to work on high-performance digital IP for cutting-edge systems. As a Senior IP Design Engineer, you will design and implement SystemVerilog RTL , developing synthesis-ready IP targeting FPG... ...

opportunity to work on high-performance digital IP for cutting-edge systems. As a Senior IP Design Engineer, you will design and implement SystemVerilog RTL , developing synthesis-ready IP targeting FPGA/Adaptive SoC platforms. You will own end-to-end design flow including RTL architecture, integration, timing closure, place … AMBA , and requires strong expertise in Vivado, Vitis, Python, Tcl, Git and CI/CD workflows . Key Responsibilities Design high-performance IP using SystemVerilog RTL for FPGA/Adaptive SoC Deliver synthesis-ready RTL meeting timing, P&R and integration requirements Implement and optimise 100GbE, PCIe Gen5, AXI/ ...

closely with internal architecture, RTL, verification, and integration teams to design, implement, and optimize IP targeting AMD Adaptive SoCs. Responsibilities include: Developing RTL in SystemVerilog for high-performance FPGA/Adaptive SoC designs Implementing and optimizing high-speed connectivity protocols Collaborating with cross-functional teams on integration, timing closure … scripting automation Required Skills & Experience The proposed candidate must meet the following qualifications: A. RTL Design & Coding Deep hands-on experience with SystemVerilog HDL for RTL design Proven ability to develop IP targeting FPGA/Adaptive SoC platforms B. High-Speed Protocols Strong experience with: 100Gb Ethernet PCIe Gen5 AMBA ...

designs, owning test plans, driving coverage closure, and supporting integration using industry-standard verification environments. Key Responsibilities Design and implement UVM/SystemVerilog verification environments Deliver constrained-random verification and achieve coverage sign-off Verify high-speed interfaces including Ethernet (100G) and PCIe (Gen4/Gen5) Integrate and use Verification … with design, architecture, and SoC teams Essential Skills & Experience Strong experience as a Verification Engineer/Design Verification Engineer Expert knowledge of UVM and SystemVerilog Experience with Ethernet, PCIe, AMBA/AXI Proven ownership of test plans and coverage closure Python scripting and Git-based workflows Experience in ASIC ...

A Digital Design Engineer with proficiency in RTL coding and a background in the design of high speed digital circuits using advanced CMOS technologies will join the talented team of an exciting name in the ...