1 to 25 of 40 Permanent SystemVerilog Jobs

and embedded system integration. Strong communication and interpersonal skills. Desirable Extras: Background in safety-critical FPGA development (e.g., RTCA/DO-254 DAL A or B). Familiarity with SystemVerilog/UVM for verification. Prior experience in Aerospace or Defence sectors. Knowledge of embedded processor cores such as ARM within FPGA architectures. Experience incorporating AI functionalities in FPGA designs. Exposure More ❯

aerospace-grade sensing for commercial markets. Key skills of the FPGA Engineer: Experience in FPGA design and system integration (Xilinx/Zynq preferred) Proficient in RTL design (Verilog/SystemVerilog/VHDL) Strong experience with Vivado and SoC development flows Background in designing and tuning real-time control loops (PLLs, PI, etc.) Comfortable debugging in the lab with ILA, scopes More ❯

aerospace-grade sensing for commercial markets. Key skills of the FPGA Engineer: Experience in FPGA design and system integration (Xilinx/Zynq preferred) Proficient in RTL design (Verilog/SystemVerilog/VHDL) Strong experience with Vivado and SoC development flows Background in designing and tuning real-time control loops (PLLs, PI, etc.) Comfortable debugging in the lab with ILA, scopes More ❯

aerospace-grade sensing for commercial markets. Key skills of the FPGA Engineer: Experience in FPGA design and system integration (Xilinx/Zynq preferred) Proficient in RTL design (Verilog/SystemVerilog/VHDL) Strong experience with Vivado and SoC development flows Background in designing and tuning real-time control loops (PLLs, PI, etc.) Comfortable debugging in the lab with ILA, scopes More ❯

aerospace-grade sensing for commercial markets. Key skills of the FPGA Engineer: Experience in FPGA design and system integration (Xilinx/Zynq preferred) Proficient in RTL design (Verilog/SystemVerilog/VHDL) Strong experience with Vivado and SoC development flows Background in designing and tuning real-time control loops (PLLs, PI, etc.) Comfortable debugging in the lab with ILA, scopes More ❯

Enablement organization in the CTO Office. SVV is responsible for developing, adopting, and supporting tools, methodologies, and solutions across the entire DV landscape - including Unified Metric-Driven Verification (MDV), SystemVerilog (SV)/UVM-based methods, Mixed-Signal DV, Post-Silicon Validation Shift-Left, Formal Verification, Functional Safety, Security, Portable Stimulus, and Emulation/Prototyping technologies. The Role We are looking More ❯

strategies, and Agile development practices. Work closely with software and ML engineers to deliver efficient, scalable inference applications. Were looking for someone with: 5+ years experience writing well-documented SystemVerilog/Verilog/VHDL. Strong FPGA toolchain knowledge (Quartus, Vivado, or equivalent). Experience in debugging, bring-up, and timing optimisation of FPGA designs. Exposure to C/C++ or More ❯

be the right fit. FPGA Engineer requirements: Minimum 3+ years commercial FPGA Engineering (Implementation, simulation, verification and test) Excellent academic background with degree from a top university Coding in SystemVerilog or VHDL FPGA external interface designs (e.g. PCIe, Aurora, Ethernet, SPI etc.) Some exposure to digital signal processing Proactive, collaborative mindset with ownership of projects This is a rare chance More ❯

Required Skills and Experience: BSc, MSc or PhD degree qualification in Electronics/Computer Engineering or equivalent Ability to understand and use Hardware Description Languages (HDLs) such as Verilog, SystemVerilog or VHDL Strong interest in and understanding of CPU architectures and SoC design principles Experience in using RTL simulation tools for debugging purposes Ability to learn and communicate IP product More ❯

as Ethernet and IP protocols, and high speed interconnects such as UCIe. Qualifications ME/BE with a minimum of 8-15 years of experience. Hands-on knowledge of SystemVerilog and Verilog is mandatory. Solid understanding of ASIC design methodologies, including simulation, verification, synthesis, and timing adjustments. Proven expertise in designing and optimizing scheduling and QoS mechanisms. Experience with Ethernet More ❯

Overview Bowhead is seeking a FPGA Engineer to join our team that supports the Hypersonics Projectiles Division of the Naval Surface Warfare Center Dahlgren and contribute to the development of high-performance digital systems. In this role, you will design More ❯

A client of Innova Solutions is immediately hiring a FPGA/ASIC Design Engineer. Position Type: Full time Contract Duration: 04 Months Location: Camden, NJ (Onsite) As a FPGA/ASIC Design Engineer, you will: • The FPGA/ASIC Design More ❯

Senior FPGA Firmware Engineer (Long-term Contract) (Job Location: El Segundo, CA area, about15 miles south-east of Los Angeles) Job Summary Client is seeking a Senior FPGA Firmware Engineer with expertise in digital signal processing, coherent combining of digital More ❯

FPGA Engineer/Senior FPGA Engineer My client, a trailblazer in advanced security technology, excels in creating high-integrity critical systems where flawless performance is non-negotiable. They continually push boundaries to exceed customer and stakeholder expectations, making excellence their More ❯

Job Title: FPGA/ASIC Design Engineer Location: Camden, NJ Duration: 12 Months Pay: $125/hr on W2 Active Secret Clearance Major purpose: The FPGA/ASIC Design Engineer will be responsible for the architecture, implementation, verification/validation More ❯

Summary: ClearanceJobs is assisting our client in filling an FPGA Developer position to support the development of a National Security Information System. Work is performed ON-SITE and is available in Arlington, VA, Annapolis Junction, MD or Denver, CO with More ❯

Summary: ClearanceJobs is assisting our client in filling an FPGA Developer position to support the development of a National Security Information System. Work is performed ON-SITE and is available in Arlington, VA, Annapolis Junction, MD or Denver, CO with More ❯

Summary: ClearanceJobs is assisting our client in filling an FPGA Developer position to support the development of a National Security Information System. Work is performed ON-SITE and is available in Arlington, VA, Annapolis Junction, MD or Denver, CO with More ❯

ensure end-to-end performance and compliance. Support test and lab evaluation using signal generators, spectrum analysers, and oscilloscopes. Lead or contribute to the implementation of designs using VHDL, SystemVerilog, and MATLAB/Simulink HDL Coder. Develop low-level C software for FPGA bring-up, test, and integration. Use industry-standard tools such as Vivado, Quartus, and ModelSim for simulation … reviews, solution development, and internal consultation across teams. Essential Experience Proven track record in delivering FPGA designs for real-time, high-speed, or RF-centric systems. Proficiency in VHDL, SystemVerilog, and embedded C for FPGA-host integration, control, and testing. Experience with MATLAB/Simulink and HDL Coder for algorithm-to-hardware workflows. Proven ability to develop and deploy on More ❯

ensure end-to-end performance and compliance. Support test and lab evaluation using signal generators, spectrum analysers, and oscilloscopes. Lead or contribute to the implementation of designs using VHDL, SystemVerilog, and MATLAB/Simulink HDL Coder. Develop low-level C software for FPGA bring-up, test, and integration. Use industry-standard tools such as Vivado, Quartus, and ModelSim for simulation … reviews, solution development, and internal consultation across teams. Essential Experience Proven track record in delivering FPGA designs for real-time, high-speed, or RF-centric systems. Proficiency in VHDL, SystemVerilog, and embedded C for FPGA-host integration, control, and testing. Experience with MATLAB/Simulink and HDL Coder for algorithm-to-hardware workflows. Proven ability to develop and deploy on More ❯

TITLE: ASIC FPGA Engineer with ACTIVE Secret clearance (US Citizenship REQUIRED) RATE RANGE: $55/hr W2 - $65/hr W2 (no health benefits while on contract) CLEARANCE: Active Secret Security Clearance required LOCATION: Onsite in Bloomington MN 55431 (no More ❯

Job details: ASIC & FPGA Design Engineering Job location: Orlando, FL - MFC Job duration: 02/26/2024 to 02/24/25 Job clearance: Interim Secret Clearance Required prior to start Work Schedule: 4/10A-1st Shift More ❯

Check out this new opportunity! Sr ASIC/FPGA Electrical Engineer Canonsburg, PA Contract Position Pay Estimated: $72.24-$84.50/Hour This estimate represents the typical salary range for this position based on experience and other factors, (geographical location, etc. More ❯

Title: FPGA Verification Engineer Location: Arlington VA, or Annapolis Junction, MD or Denver, CO Security Clearance: TS/SCI required Job Type: Full-Time; 100% On site Position Overview ClearanceJobs' customer is seeking a highly skilled FPGA Verification Engineer to More ❯

Job Description: •Develops, designs, verifies, and documents Application-Specific Integrated Circuits (ASIC) and Field Programmable Gate Arrays (FPGA) development. •Determines architecture design, logic design, and system simulation. •Assignments include the analysis of all aspects from high-level design to synthesis More ❯