151 to 175 of 245 Permanent SystemVerilog Jobs

determine implementation approaches, and design testbenches. Expertise in root‐cause analysis of complex issues, with the ability to resolve them efficiently. Deep knowledge of SystemVerilog and UVM. Capability to develop and enhance verification flows. Familiarity with ASIC design methodologies, flows, and tools. Proficiency in planning, estimating, and tracking personal tasks. ...

with design, verification and software driver teams Required Skills and Experience : Experience in hardware verification methodology and planning Programming skills including Hardware Description Languages (SystemVerilog/UVM) Proficiency in problem solving and debugging “Nice To Have” Skills and Experience : Experience with reusing and integrating external VIPs Experience in Python ...

prem resources from a single source of truth. Scale and maintain Fractile's Bazel monorepo as we continue growing across Python, C++, Rust, SystemVerilog, and ML workloads. Shape the infrastructure and platform experience for every engineer at Fractile. About you You bring deep infrastructure and build systems expertise alongside ...

prem resources from a single source of truth.Scale and maintain Fractile's Bazel monorepo as we continue growing across Python, C++, Rust, SystemVerilog, and ML workloads.Shape the infrastructure and platform experience for every engineer at Fractile.About youYou bring deep infrastructure and build systems expertise alongside an SRE mindset. ...

stack is, in fact, in Java). However, once you are here, you will be exposed to a diverse tech stack including Python, TypeScript, SystemVerilog (for FPGAs), Raft, Kubernetes, DLT, Angular, and more. The Package Equity: We offer real equity options. You are building the company’s value ...

The Mission At OQC, we aren’t just theorising about the future; we’re building it. Born from a philosophy of bold innovation, we’ve successfully transitioned quantum computing from an academic dream into a ...

Capital Resources Ltd in Edinburgh is seeking a Principal Verification Engineer to lead verification for advanced Chiplet designs. You will craft verification environments, implement SystemVerilog/UVM scoreboards and self-checking regression suites, and drive MDV-based functional coverage. The role requires working across ASIC/SoC/IP verification ...

Engineer to join the core software team in London. You will own the CI stack and end-to-end pipelines across Python, C++, Rust, SystemVerilog, and ML workloads. You will build and maintain observability, incident response workflows, and infrastructure-as-code for hybrid cloud and on‐prem resources, enabling rapid ...

projects and leading a high-performing team. The ideal candidate will have extensive experience in CPU, GPU, or SoC environments with strong skills in SystemVerilog, Python, and C++. The firm offers a competitive salary, flexible working, and a range of perks including private medical insurance and generous leave policies. #J ...

blocks for mobile and PC devices. You will verify complex microarchitectures, understand block interactions, and work within a team on robust testing strategies. Using SystemVerilog, UVM, and scripting languages, you will build test benches, generate tests, and run simulations to achieve high-quality closure. #J-18808-Ljbffr ...

tests, and collaborating with teams on high-quality RTL releases. Ideal candidates should have a software mindset to solve hardware problems, strong skills in SystemVerilog, and an eagerness to learn and improve practices within a fast-paced, collaborative environment. #J-18808-Ljbffr ...

tests, and collaborating with teams on high-quality RTL releases. Ideal candidates should have a software mindset to solve hardware problems, strong skills in SystemVerilog, and an eagerness to learn and improve practices within a fast-paced, collaborative environment. #J-18808-Ljbffr ...

incident workflows, and manage infrastructure as code for hybrid cloud and on‐prem resources. You will scale a Bazel monorepo across Python, C++, Rust, SystemVerilog and ML workloads, shaping the platform experience for every engineer. You bring 5+ years in software/infrastructure, hands-on CI/CD for large ...

Digital Verification Engineers. Leaders with the ability to build, recruit and develop a high-performing verification function. Technical Background ASIC/SoC Digital Verification. SystemVerilog and UVM. Functional Verification and Formal Verification. RISC-V processor and SoC verification. Experience leading or managing DV engineering teams. Why Consider This? A rare ...

Digital Verification Engineers. Leaders with the ability to build, recruit and develop a high-performing verification function. Technical Background ASIC/SoC Digital Verification. SystemVerilog and UVM. Functional Verification and Formal Verification. RISC-V processor and SoC verification. Experience leading or managing DV engineering teams. Why Consider This? A rare ...

improved. What They're Looking For Experience managing or leading digital verification engineers Strong background in the verification of complex ICs Strong SystemVerilog and UVM experience, with knowledge of assertions and coverage-driven verification Experience developing verification strategies and using metrics such as code and functional coverage Ability to support ...

Digital Verification Engineers. Leaders with the ability to build, recruit and develop a high-performing verification function. Technical Background ASIC/SoC Digital Verification. SystemVerilog and UVM. Functional Verification and Formal Verification. RISC-V processor and SoC verification. Experience leading or managing DV engineering teams. Why Consider This? A rare ...

Digital Verification Engineers. Leaders with the ability to build, recruit and develop a high-performing verification function. Technical Background ASIC/SoC Digital Verification. SystemVerilog and UVM. Functional Verification and Formal Verification. RISC-V processor and SoC verification. Experience leading or managing DV engineering teams. Why Consider This? A rare ...

microarchitecture, performance modeling, RTL design, or design verification. You can work across the adjacent parts of architecture, RTL, verification, and software. You can write SystemVerilog and use Python or C++ for modeling, automation, and verification. You understand pipelines, memory systems, interconnects, and ASIC design flows. You can turn incomplete workload ...

experience levels. Required Skills and Experience: Significant experience in IP/SoC verification with deep knowledge of verification methodologies and processes Deep expertise in SystemVerilog and UVM based test bench or verification IP development Strong understanding of functional verification methodologies, including constrained-random verification, coverage-driven verification, formal verification ...

Are you ready to shape the future of cutting-edge technology? Leonardo, a global leader in advanced electronics, is seeking Firmware/FPGA Engineers at various levels to join our innovative teams across the UK. ...

## Firmware/FPGA Engineers - all levelsApplylocations: GB - Edinburgh: GB - Newcastletime type: Full timeposted on: Posted Todayjob requisition id: R0030762**Job Description:**Salary: Engineer: £37,400 to £53,550/Senior: £45, 200 to £61 ...

Job Description:Salary: Engineer: £37,400 to £53,550/Senior: £45, 200 to £61,950/Principal: £53,300 to £71,400/Lead: £59,400 to £84,955Leonardo UK operates a grade-based ...

author design intent documents (SDC/UPF) while collaborating with verification and implementation teams to ensure timely delivery. Ideal candidates will have strong SystemVerilog skills, experience with complex SoC architectures, and familiarity with UNIX scripting to support automation #J-18808-Ljbffr ...

Design Engineer job in Southampton: Define and optimise capacitive sensing architectures and acquisition strategies Develop and verify RTL designs using Verilog and/or SystemVerilog Develop embedded software for sensing and signal-processing applications Lead silicon bring-up, debugging and validation activities Solve complex technical challenges across analogue, digital … Physics or a related discipline Experience in digital or mixed-signal IC design and development Strong RTL design experience using Verilog and/or SystemVerilog Embedded software development experience in C/C++ Good understanding of microcontroller architectures and embedded systems Experience using Python, MATLAB or similar tools for modelling ...