301 to 325 of 524 Permanent SystemVerilog Jobs

design reviews and contribute to technical decision-making Document technical specifications and development progress Contribute to bring-up, synthesis, and physical-aware design flows Verification Responsibilities: Develop UVM/SystemVerilog testbenches and functional verification plans Implement directed and constrained-random tests for robust coverage Execute regression testing, debug RTL, and track issues to resolution Verify block-level and system-level … formal verification techniques when applicable Measure and validate system performance and functional correctness Collaborate closely with RTL designers and architects Design Requirements: 5+ years of experience in RTL design (SystemVerilog or VHDL) Deep knowledge of digital design principles and computer architecture Experience with GPU, vector processors, or AI accelerator design Familiarity with RISC-V instruction set architecture (preferred) Understanding of … similar BS/MS in Electrical Engineering, Computer Engineering, or related field Verification Requirements: 5+ years of experience in hardware verification (complex SoCs preferred) Strong understanding of UVM and SystemVerilog methodologies Experience with advanced verification techniques (coverage, assertions, formal) Familiarity with RISC-V and GPU/AI architectures (preferred) Proficient with simulators and debug tools (e.g., VCS, Questa, ModelSim) Scripting More ❯

a related field. (PLUS) Proven experience with formal verification tools (e.g., Cadence JasperGold, Synopsys VC Formal, or equivalent tools). Hands-on experience with RTL design such as Verilog, SystemVerilog, or VHDL. Experience with verification methodologies such as UVM (Universal Verification Methodology) or other simulation-based verification techniques. Experience with assertions (e.g., SVA - SystemVerilog Assertions) and formal verification environments. On More ❯

protocols such as AMBA AHB, APB, and at least one variant of AXI, including AXI3, AXI4, AXI4-Lite, ACE, or AXI5 Proficient RTL design skills using VHDL, Verilog, or SystemVerilog Solid understanding of functional verification, ideally using SystemVerilog Demonstrated leadership in complex IP and full ASIC design projects from concept through to RTL completion. Knowledge of multiple chip-level communication More ❯

or more years of proven verification experience on large ASIC development projects or software/firmware experience in a hardware development setting;Strong background in PSS/UVM/SystemVerilog; Experience in Verilog/SystemVerilog/SystemC, preferred;Experience in C/Verilog environment using DPI/PLI, preferred;Strong analytical skills and attention to detail;Excellent written and communication More ❯

AI, HPC, and other advanced technologies. Requirements: Bachelors or Masters in Electrical Engineering or a related field Proven experience in 3+ successful tapeouts Proficiency in RTL design (Verilog/SystemVerilog) Experience in semiconductor IP design Experience with TCL This client also has a site in Rome and Ghent, so this position can also be based there. Email - Tel - LinkedIn More ❯

deliver a new product to a key Defence client. Requirements Experience with Xilinx products Understanding of DSP VHDL encoding in a Linux environment Knowledge of Verilog and/or SystemVerilog Active SC clearance required Application Process Please apply online or email me directly (see below). For further information, call me. If unavailable, leave a message, and we will respond. More ❯

but would best suit someone with 1-5 years of experience. Responsibilities Development of Wi-Fi products, including microcontrollers and connectivity. Test bench and test case generation using Verilog, SystemVerilog, UVM, C, Formal. Embedded C code or writing CPU-centric tests using C. Qualifications MSc in electrical engineering or equivalent or Bachelor with industrial experience. Knowledge of verification planning, assertion More ❯

at global conferences and contribute to patents What You Bring 8+ years in secure hardware design Master's/PhD in EE, CE, or similar Strong RTL (Verilog/SystemVerilog), ASIC flow, and scripting (Python/Perl) skills Hands-on with Synopsys/Cadence toolchains Perks Work with top-tier security experts Flexible hybrid setup + visa/relocation support More ❯

at global conferences and contribute to patents What You Bring 8+ years in secure hardware design Master's/PhD in EE, CE, or similar Strong RTL (Verilog/SystemVerilog), ASIC flow, and scripting (Python/Perl) skills Hands-on with Synopsys/Cadence toolchains Perks Work with top-tier security experts Flexible hybrid setup + visa/relocation support More ❯

and design techniques, being able to offer improvements to efficiency and quality for both the design flow and the final product. Required skills: Knowledge of an RTL language (Verilog, SystemVerilog) for complex ASIC/FPGA products A strong skillset in delivering digital designs in the ASIC and FPGA industry Optimisation of timing and hardware resources for high throughput data or More ❯

experience in frontend RTL design. Solid understanding of digital design principles, including pipelining, clock domain crossing, and low-power design techniques, high performance design techs. Proficient in Verilog/SystemVerilog/VHDL. Familiar with ASIC design flow and tools. Experience with GPU design or computer graphics architecture. Familiarity with high-speed interfaces and memory subsystems. Familiarity with modern graphics. You More ❯

experience in frontend RTL design. Solid understanding of digital design principles, including pipelining, clock domain crossing, and low-power design techniques, high performance design techs. Proficient in Verilog/SystemVerilog/VHDL. Familiar with ASIC design flow and tools. Experience with GPU design or computer graphics architecture. Familiarity with high-speed interfaces and memory subsystems. Familiarity with modern graphics. You More ❯

and design techniques, being able to offer improvements to efficiency and quality for both the design flow and the final product. Required skills: Knowledge of an RTL language (Verilog, SystemVerilog) for complex ASIC/FPGA products A strong skillset in delivering digital designs in the ASIC and FPGA industry Optimisation of timing and hardware resources for high throughput data or More ❯

experience in frontend RTL design. Solid understanding of digital design principles, including pipelining, clock domain crossing, and low-power design techniques, high performance design techs. Proficient in Verilog/SystemVerilog/VHDL. Familiar with ASIC design flow and tools. Experience with GPU design or computer graphics architecture. Familiarity with high-speed interfaces and memory subsystems. Familiarity with modern graphics. You More ❯

experience in frontend RTL design. Solid understanding of digital design principles, including pipelining, clock domain crossing, and low-power design techniques, high performance design techs. Proficient in Verilog/SystemVerilog/VHDL. Familiar with ASIC design flow and tools. Experience with GPU design or computer graphics architecture. Familiarity with high-speed interfaces and memory subsystems. Familiarity with modern graphics. You More ❯

experience in frontend RTL design. Solid understanding of digital design principles, including pipelining, clock domain crossing, and low-power design techniques, high performance design techs. Proficient in Verilog/SystemVerilog/VHDL. Familiar with ASIC design flow and tools. Experience with GPU design or computer graphics architecture. Familiarity with high-speed interfaces and memory subsystems. Familiarity with modern graphics. You More ❯

be responsible for ensuring the exceptional quality of complex graphics IP designs. You will collaborate with multi-functional teams to tackle new challenges, requiring robust written and verbal abilities.Using SystemVerilog, UVM, C++, and scripting languages, you will develop test benches, generate tests, run and debug simulations to drive our complex graphics IPs to high-quality closure.As you progress, you'll More ❯

firm also has roles within its core tech group if you’re not keen working on trading desks. Requirements At least 5+ years’ hands-on development experience in HDL (SystemVerilog/VHDL) with C++ knowledge Solid experience in solving numerical problems with existing commercial architectures (CPU/GPU/FPGA/etc.) Sound knowledge of bridging solution from both hardware More ❯

and design techniques, being able to offer improvements to efficiency and quality for both the design flow and the final product. Required skills: Knowledge of an RTL language (Verilog, SystemVerilog) for complex ASIC/FPGA products A strong skillset in delivering digital designs in the ASIC and FPGA industry Optimisation of timing and hardware resources for high throughput data or More ❯

for a specialised edge. You’ll work on designs featuring high-speed serial I/O, PCIe interfaces, and large-scale FPGA deployments. The tooling is standard, (Verilog/SystemVerilog, Verilator, and C++,) what you build needs to be anything but. If the manufacturer thinks it's possible with their hardware, you've not gone far enough. Being successful here More ❯

for a specialised edge. You’ll work on designs featuring high-speed serial I/O, PCIe interfaces, and large-scale FPGA deployments. The tooling is standard, (Verilog/SystemVerilog, Verilator, and C++,) what you build needs to be anything but. If the manufacturer thinks it's possible with their hardware, you've not gone far enough. Being successful here More ❯

San Diego Pay: $90-$115/hr DOE Clearance Level: Secret Job Requirements • FPGA experience • Experience in UVM, entire process of UVM test benches including architecture, design, and implementation • Systemverilog experience a plus • Nice to have skills: DO-254, PCB design About Performance and Talent Tier: Performance Software and its sister company, Talent Tier, are engaged in the design of More ❯

San Diego Pay: $90-$115/hr DOE Clearance Level: Secret Job Requirements • FPGA experience • Experience in UVM, entire process of UVM test benches including architecture, design, and implementation • Systemverilog experience a plus • Nice to have skills: DO-254, PCB design About Performance and Talent Tier: Performance Software and its sister company, Talent Tier, are engaged in the design of More ❯

for a specialised edge. You’ll work on designs featuring high-speed serial I/O, PCIe interfaces, and large-scale FPGA deployments. The tooling is standard, (Verilog/SystemVerilog, Verilator, and C++,) what you build needs to be anything but. If the manufacturer thinks it's possible with their hardware, you've not gone far enough. Being successful here More ❯

for a specialised edge. You’ll work on designs featuring high-speed serial I/O, PCIe interfaces, and large-scale FPGA deployments. The tooling is standard, (Verilog/SystemVerilog, Verilator, and C++,) what you build needs to be anything but. If the manufacturer thinks it's possible with their hardware, you've not gone far enough. Being successful here More ❯