151 to 175 of 237 Permanent Verilog Jobs

Qualifications: Bachelor’s, Master's or PhD degree in Electrical Engineering (or related discipline) Comprehensive understanding of digital circuit design in RTL using Verilog and SystemVerilog Knowledge and understanding of verification of block-level digital designs Experience and understanding of synthesis and timing analysis of digital circuits Knowledge of design ...

analysis and diagnosis. Experience with industry-standard EDA tools such as: Siemens Tessent Synopsys TetraMAX/TestMAX Strong scripting skills in Tcl & PythonFamiliarity with Verilog/SystemVerilog and simulation environments Excellent debugging and problem-solving skillsGood communication and excellent collaboration skills.This position is based in our Edinburgh office, UK. This ...

experience with behavioural modelling and virtual prototyping of integrated circuit blocksKnowledge of semiconductor manufacturing processes, device structures, and their interactionsExperience with Compact SPICE modelling, Verilog-A, and VHDL-AMSHands-on experience with simulation and design tools such as TCAD, ICCAP, LTspice, Cadence, KLayout, and R3DStrong data analysis, problem-solving ...

mismatches and test failures. Hands-on experience with emulation platforms such as ZeBu, Palladium, or Strato. Familiarity with RTL languages such as SystemVerilog/Verilog Experience in collaboration with EDA vendors to introduce new capabilities, resolve tool issues, and contribute to future tool improvements. Skilled in planning system test tasks ...

mismatches and test failures. Hands-on experience with emulation platforms such as ZeBu, Palladium, or Strato. Familiarity with RTL languages such as SystemVerilog/Verilog Experience in collaboration with EDA vendors to introduce new capabilities, resolve tool issues, and contribute to future tool improvements. Skilled in planning system test tasks ...

Fuzes) for DOD weapon systems. Microsemi/Actel is our targeted FPGA and QuestaSim is our simulation tool. The primary responsibilities will focus on Verilog FPGA design, System Verilog UVM verification and C# based microcontroller development. Essential Functions: Analysis of the requirements, architecture definition, design and debug of FPGA … associated hardware and microcontroller products and associated firmware. Developing Verilog HDL targeting Antifuse and enhanced Flash FPGA's. Performing effective analysis of functional issues or performance profiling with the hardware and firmware in test environments or target host systems. Contribute to process improvements to ensure hardware-firmware quality and time ...

will own technical activities, capture requirements, and work with Systems, Hardware and Software teams to ensure smooth integration. The role emphasizes strong VHDL/Verilog design, independent verification, and experience with Mentor Graphics tools and major FPGA flows. #J-18808-Ljbffr ...

candidate should have a BEng or MEng in a relevant field and at least 5 years of experience in digital design, with proficiency in Verilog, SystemVerilog, and/or VHDL. The role offers a hybrid work model and Visa sponsorship is available. #J-18808-Ljbffr ...

semiconductor company is seeking a Senior Staff Verification Engineer to join their team in Bristol. The successful candidate will be responsible for developing System Verilog - UVM test benches, debugging, and enhancing verification strategies. Applicants should have a Bachelor’s degree in Electrical/Electronic Engineering and at least 5 years ...

Lockheed Martin in Gloucester is seeking a Senior FPGA Engineer with VHDL/Verilog to contribute to defence, cyber, and intelligence programmes. You will help design, develop, test and deploy RF systems and SDR applications within a multi-disciplinary team, using the OpenCPI framework. The role offers hybrid work options ...

years of experience in verification, with IP level as mandatory and Subsystem level as an advantage Expertise in hardware verification languages, particularly System Verilog and UVM, with the ability to design efficient and effective test bench architectures Familiarity with EDA tools for Design and Simulation, as well as scripting languages ...

years of experience in verification, with IP level as mandatory and Subsystem level as an advantage Expertise in hardware verification languages, particularly System Verilog and UVM, with the ability to design efficient and effective test bench architectures Familiarity with EDA tools for Design and Simulation, as well as scripting languages ...

understanding of best-practice digital design methods. Be familiar executing designs via a fully synthesised digital design flow with RTL and logic synthesis. Verilog and SystemVerilog experience. Be familiar with the use of constraints and the automatic place-and-route flow for the physical design. Have experience of design techniques ...

design and verification, is highly desirable. Proven track record of delivering circuit designs with minimal supervision is required for Staff level. Working knowledge of Verilog-AMS modelling, MATLAB and Python is a bonus. Familiar with the use of laboratory equipment e.g. spectrum analysers, digital oscilloscopes, signal generators. Preferred Qualifications: Enthusiastic ...

design and verification, is highly desirable. Proven track record of delivering circuit designs with minimal supervision is required for Staff level. Working knowledge of Verilog-AMS modelling, MATLAB and Python is a bonus. The role is also open for recent graduates with a relevant PhD depending upon specialization. Familiar with ...

paced, multi-functional environment.“Nice To Have” Skills and Experience :Experience with GPU, CPU or other complex processor architectures.Familiarity with verification methodologies including System Verilog, UVM or formal verification.Experience with industry-standard EDA tools (e.g. Cadence or Synopsys).Knowledge of requirements management tools such as Jama, DRM or similar.Exposure ...

scheduling and register renaming, out-of-order execution, integer and floating point execution, load/store execution, prefetching, cache and memory subsystems Knowledge of Verilog and/or VHDL. Experience with simulators and waveform debugging tools Knowledge of logic design principles along with timing and power implications Understanding ...

Contribute to the design, implementation, verification, and delivery of high-performance digital hardware IP for wireless communication systems Develop RTL designs using SystemVerilog, Verilog, or VHDL for FPGA and ASIC technologies Support development and verification of communications signal processing functions and hardware architectures Collaborate with hardware, algorithm, software, and systems … related technical discipline Understanding of digital design fundamentals, including combinational and sequential logic, finite state machines, timing concepts, and digital architectures Exposure to Verilog, SystemVerilog, or VHDL through academic projects, placements, internships, or personal projects Basic knowledge of Python, MATLAB, Tcl, or Bash Strong analytical, problem-solving, and debugging skills ...

Engineer to take technical ownership of complex FPGA‐based designs, from architecture through verification and hardware bring‐up. You will be hands‐on in Verilog, simulation and debugging, delivering robust RTL and setting high verification standards. You will mentor junior engineers and collaborate with hardware, RF and embedded software teams ...

designing industry-leading CPU cores, across the full design lifecycle, with collaboration from world-class architects. The role requires 6+ years RTL experience, Verilog/SystemVerilog/VHDL, CPU RTL, and knowledge of RISC-V. Relocation support across Europe and visa sponsorship available for exceptional candidates. #J-18808-Ljbffr ...

global technology partner and leading edge programmes. The role offers ownership of projects within a close-knit engineering team, with exposure to RTL/Verilog, SystemVerilog, UVM verification, and SoC architectures. Applicants must have the right to work in the UK. #J-18808-Ljbffr ...

FPGA engineer to translate probabilistic models into high-performance RTL and integrate with analogue front ends. You will design from scratch in VHDL/Verilog, work with PS/PL architectures, and ensure timing closure across clock domains. Strong HDL, lab debug, and FPGA toolchain experience are essential. This role ...

level definition & specification Integrated single chip RF + Digital baseband projects Top level chip simulation and functional verification Mixed-mode simulation environments (e.g. mixed verilog and device level) Direct conversion Rx and Tx architectures and associated considerations DFT and BIST for analog and RF circuits Silicon test and de-bugging ...

implementation of technologies and methodologies to improve GPU power, performance and area (PPA).Required Skills and Experience :Experience with hardware description languages (System Verilog preferable).Experience using EDA simulators (Siemens, Synopsys, Cadence)Strong problem solving and debugging skills, and ability to closely collaborate with other teams.Experience working with version control ...

implementation of technologies and methodologies to improve GPU power, performance and area (PPA). Required Skills and Experience : Experience with hardware description languages (System Verilog preferable). Experience using EDA simulators (Siemens, Synopsys, Cadence) Strong problem solving and debugging skills, and ability to closely collaborate with other teams. Experience working ...