related field Bachelor of Science in applicable engineering or science field preferred with 9+ years experience, however candidates with 13+ years experience relevant equivalent experience will be considered HDL (Verilog/VHDL) simulation/programming/debug Experience with Xilinx FPGA/MPSoC/RFSoC projects and Xilinx toolsets (ISE and/or Vivado) Experience with High-Level Synthesis Tools More ❯
Cambridge, Cambridgeshire, United Kingdom Hybrid / WFH Options
Arm Limited
Engineering, Computer Engineering, or Computer Science. Solid understanding of emulation methodologies and flows. Experience with emulation platforms such as ZeBu, Palladium, or Strato. Familiarity with RTL languages (SystemVerilog/Verilog) and UVM-based verification environments. Hands-on experience in compiling and debugging large-scale designs on emulation platforms. Proficiency in scripting (Python, Perl, or similar) to automate workflows and diagnostics. More ❯
City of London, London, United Kingdom Hybrid / WFH Options
Platform Recruitment Limited
tapeout on next-generation chip architectures in areas like memory, interconnect, and high-speed interface design. Key Responsibilities: + Develop and Integrate designs of RTL for digital blocks (using Verilog/SystemVerilog/VHDL) + Undertake Digital IC Design processes & Perform design synthesis, linting + Complete projects from conception to completion Skills Required: + Experience with frontend RTL Design + … Strong Experience with SystemVerilog, Verilog or VHDL + Has had exposure to ASIC design flow (Lint, syntheisis, simulation) + Digital Design Principles experience pipelining, clock domain crossing Further Details: This role offers remote working with a potential visit into the office every month. A competitive salary, bonus scheme, and a strong benefits package. If you are a driven and experienced More ❯
Cambridge, Cambridgeshire, England, United Kingdom
Avanti
a great opportunity to work on advanced radar and sensor technologies that make a real difference in security applications worldwide. You’ll need: FPGA Design experience in VHDL or Verilog Strong competency with Xilinx Vivado A background in DSP would be desirable More ❯
future of AI, HPC, and other advanced technologies. Required Skills & Experience Master's degree in a relevant field. Proven experience in 3 successful tapeouts Expertise in UVM/System Verilog Experience with Formal Verification Experience with scripting languages such as Python, Perl or Bash Knowledge of NoC, PCIe, DDR and other standard peripherals is desirable but not essential This Senior More ❯
block level definition & specification ADDITIONAL USEFUL EXPERIENCE: System simulation Integrated single chip RF + digital baseband projects Top level chip simulation and functional verification Analogue behavioral language modeling (e.g. Verilog-AMS) Mixed-mode simulation environments (e.g. mixed Verilog and device level) Direct conversion Rx and Tx architectures and associated considerations DFT and BIST for analogue and RF circuits Silicon test More ❯
block level definition & specification ADDITIONAL USEFUL EXPERIENCE: System simulation Integrated single chip RF + digital baseband projects Top level chip simulation and functional verification Analogue behavioral language modeling (e.g. Verilog-AMS) Mixed-mode simulation environments (e.g. mixed Verilog and device level) Direct conversion Rx and Tx architectures and associated considerations DFT and BIST for analogue and RF circuits Silicon test More ❯
Cambridge, Cambridgeshire, United Kingdom Hybrid / WFH Options
Octagon Group
help build low-latency/high-throughput applications. What skills and experience is required: FPGA Design, development and testing experience Previous experience in using SystemVerilog, VHDL and/or Verilog Exposure to Quartus and/or Vivado Any exposure or understanding of low latency, machine learning, or neutral network architectures would be beneficial but not essential. *Visa Sponsorship is available More ❯
Oxford, Oxfordshire, United Kingdom Hybrid / WFH Options
Darwin Recruitment
and CAN. Good understanding of how satellite systems work together. Experience writing test plans and running verification on avionics. Nice to have (but not essential): FPGA development (VHDL or Verilog). Python scripting for test automation. Experience working in a cleanroom or handling flight hardware. Background in GNSS, time sync, or radiation tolerance in LEO. Why this role? Flexible hybrid More ❯
Hastings, Sussex, United Kingdom Hybrid / WFH Options
microTECH Global Limited
Expertise in logic gates, flip-flops, and state machines FPGA & ASIC Development: Experience in designing and implementing FPGAs and ASICs HDL Proficiency: Strong knowledge of VHDL and/or Verilog Embedded Systems: Familiarity with microprocessor and microcontroller architectures Mixed-Signal Design: Understanding of ADCs, DACs, and analog/digital interfaces Hardware design and verification against formal requirements Experience in requirements More ❯
and digital aspects of receiver design A deep understanding of SDR architecture, DSP theory, and RF signal processing Hands-on experience with tools such as MATLAB, Simulink, VHDL, or Verilog Familiarity with FPGAs and implementing DSP algorithms in embedded systems Knowledge of radio propagation, interference mitigation, and system-level testing At least 10 years' experience in DSP, RF, and communications More ❯
OrCAD Capture preferred). Familiarity with lab instrumentation including signal generators, high-speed oscilloscopes, and logic analyzers. Experience with firmware/microcontroller integration and working knowledge of VHDL/Verilog is a plus. Strong technical documentation and system interface definition experience. Moseley Technical Services, Inc. is an AA/EEO/Veterans/Disabled Employer. Still have questions? Reach out More ❯
Cambridge, Cambridgeshire, United Kingdom Hybrid / WFH Options
Qualcomm
PhD in Science, Engineering, or related field and 2+ years of ASIC design, verification, validation, integration, or related work experience. Preferred Skills: • Simulation based verification using UVM/System Verilog What's on Offer Apart from working in an open, relaxed and collaborative space, you will enjoy: Salary, stock and performance related bonus Employee stock purchase scheme Matching pension scheme More ❯
of professional experience in the field of Digital Design Experience in technically leading a team of experts , motivating them to achieve outstanding results Proficiency in SystemVerilog and/or Verilog/VHDL for RTL design and verification tasks Experience with top-level integration of complex SoCs and Design for Test (DFT) Familiarity with UPF (Unified Power Format) to manage power More ❯
driving IP automation - preferably within the semiconductor industry Willingness to lead cross-functional teams and give strong support to our Technical Leads Proficiency in hardware description languages (e.g., VHDL, Verilog) Familiarity with IP development tools and methodologies (e.g., synthesizable RTL, DFT, PPA optimization) Experience with automation frameworks and scripting languages (e.g., Python, Perl) would be an advantage Knowledge of integrated More ❯
Outstanding Electronics Engineers sought to join a development team designing advanced FPGA-accelerated hardware to power the future of the internet. Joining this team, you would work at the cutting edge of digital design, creating connectivity solutions which will underpin More ❯
verification report as needed to show all implemented tests passing on the RTL. • Methodologies will include a mix of design checks, verification techniques using simulators and emulators: UVM, formal, Verilog/System Verilog based testbenches and C, System Verilog, UVM based testcases More ❯
disciplinary team + Technical liaison, and maintenance and design specification of documentation Skills and Experience Required: + Deep understanding of FPGA fundamentals, fabric, and clocking resources + Proficiency in Verilog/System Verilog + Experience with RTL-level design + Previous telecommunications experience + Knowledge of 4G or 5G standards Bonus: + Experience with scripting languages (e.g. Python, Shell, Perl More ❯
Maidenhead, Royal Borough of Windsor and Maidenhead, Berkshire, United Kingdom
Platform Recruitment
disciplinary team + Technical liaison, and maintenance and design specification of documentation Skills and Experience Required: + Deep understanding of FPGA fundamentals, fabric, and clocking resources + Proficiency in Verilog/System Verilog + Experience with RTL-level design + Previous telecommunications experience + Knowledge of 4G or 5G standards Bonus: + Experience with scripting languages (e.g. Python, Shell, Perl More ❯
verification solutions. Key Responsibilities: Perform SOC verification with a focus on ARM ecosystem and PCIe, including PCIe-VIP usage. Develop and execute test plans, test benches, and simulations using Verilog, SystemVerilog, and UVM. Conduct GLS (Gate Level Simulation) and ensure comprehensive code and functional coverage. Collaborate with onsite and offshore teams to coordinate verification activities and deliverables. Utilize GIT for … strong analytical and problem-solving skills throughout the verification process. Skills, Experience, and Abilities Required: 5 to 10 years of industry experience in SOC/IP verification. Expertise in Verilog, SystemVerilog, and UVM. Strong experience with code coverage, functional coverage, and test development. Hands-on experience with ARM ecosystem and PCIe protocols. Proficient in C/SystemVerilog and familiar with More ❯
Engineer and don't miss this opportunity to join Infineon's success story. As a Staff Verification Engineer, you will play a critical role in developing and maintaining System Verilog - UVM test benches, solving complex problems, and develop new SV UVM verification components. Your responsibilities will also include understanding and modifying Specman-e test benches, debugging failing test cases, and … enhancing the verification strategy and architecture of IP testbenches, ensuring test bench quality, and meeting sign-off targets. In your new role, you will: Be responsible for developing System Verilog - UVM testbench and solve potentially complex problems related to test bench development Be responsible and lead developing of new SV UVM verification components Be able to understand and modify Specman … have: A Bachelor's degree in Electrical/Electronic Engineering or equivalent degree At least 3 years of experience working in Verification, preferably at the IP level, with System Verilog - UVM; Prior knowledge in Specman-e is desirable Advanced knowledge in UVM and SVAs, System Verilog Experience with Verification platform and framework development Proven experience of ownership of IP verification More ❯
Engineer and don't miss this opportunity to join Infineon's success story. As a Principal Verification Engineer, you will play a critical role in developing and maintaining System Verilog - UVM test benches, solving complex problems, and leading the development of new SV UVM verification components. Your responsibilities will also include understanding and modifying Specman-e test benches, debugging failing … enhancing the verification strategy and architecture of IP testbenches, ensuring test bench quality, and meeting sign-off targets. In your new role, you will: Be responsible for developing System Verilog - UVM testbench and solve potentially complex problems related to test bench development Be responsible and lead developing of new SV UVM verification components Able to understand and modify Specman-e … have: A Bachelor's degree in Electrical/Electronic Engineering or equivalent degree At least 10 years of experience working in Verification, preferably at the IP level, with System Verilog - UVM; Prior knowledge in Specman-e is desirable Advanced knowledge in UVM and SVAs, System Verilog Experience with Verification platform and framework development Proven experience of ownership of IP verification More ❯
and MRAM controller for better performance. Modularize the overall FPGA architecture to enhance configurability. Skills and experience required: Proven experience in FPGA design and development. Proficiency in VHDL/Verilog and FPGA toolchains. Strong understanding of digital communication protocols Experience with hardware-software integration and testing. Bonus: Experience with EDVT/board bring-up test environments and 10Ge networking. Knowledge More ❯
and MRAM controller for better performance. Modularize the overall FPGA architecture to enhance configurability. Skills and experience required: Proven experience in FPGA design and development. Proficiency in VHDL/Verilog and FPGA toolchains. Strong understanding of digital communication protocols Experience with hardware-software integration and testing. Bonus: Experience with EDVT/board bring-up test environments and 10Ge networking. Knowledge More ❯