26 to 50 of 90 Permanent Verilog Jobs

for bill of materials generation and costing estimates. Practical problem-solving skills. Understanding of educational market requirements. Desirable Skills:- SPICE simulation experience. VHDL/Verilog Design knowledge. Familiarity with communication buses and techniques. Proficiency in Python/PHP/Perl/MATLAB/LabVIEW/Siemens environments. Understanding of analogue more »

FPGA Design Engineer - VHDL or Verilog Location: Leicester Salary: £50,000 An electronics businesses who specialise in the design and development of complex instrumentation for clients, who include household names from the world of F1, Automotive, Higher Education Institutions, Consumer Electronics and Whitegoods, are looking to recruit an FPGA Engineer more »

design and embedded software development Experience in any of the following areas would be advantageous, but is not a prerequisite FPGA design VHDL or Verilog Communications protocols eg SPI, I2C, etc Version control software Embedded software or firmware design C/C++ programming If you are looking for a role more »

electrical engineering, software, computer science - Experience developing circuitry and control systems - Experience in Architecting and writing firmware in one or more of C, C++, Verilog or VHDL - Strong team player and collaborator - Experience in medical and life sciences sectors is highly desired - Experience in a design consultancy is highly desired more »

include producing HDL code for VITA-49 or similar network SDR transport protocols; designing and implementing digital IF algorithms and architectures using VHDL or Verilog, developing and testing FPGA firmware and software as well as performing simulation and verification of FPGA designs. Remuneration Package: A generous base salary will be more »

TCL designs utilizing IP Cores for rapid development. 6. Build scripting to support continuous integration. 7. Design and development of test benches to prove Verilog code. 8. Conduct floor-planning and timing analysis of designs, achieving timing closure. 9. Test of HDL code on target platform. 10. Integration of firmware more »

TCL designs utilizing IP Cores for rapid development. 6. Build scripting to support continuous integration. 7. Design and development of test benches to prove Verilog code. 8. Conduct floor-planning and timing analysis of designs, achieving timing closure. 9. Test of HDL code on target platform. 10. Integration of firmware more »

include producing HDL code for VITA-49 or similar network SDR transport protocols; designing and implementing digital IF algorithms and architectures using VHDL or Verilog, developing and testing FPGA firmware and software as well as performing simulation and verification of FPGA designs. Remuneration Package: A generous base salary will be more »

include producing HDL code for VITA-49 or similar network SDR transport protocols; designing and implementing digital IF algorithms and architectures using VHDL or Verilog, developing and testing FPGA firmware and software as well as performing simulation and verification of FPGA designs. Remuneration Package: A generous base salary will be more »

integrated circuit (IC) design, ideally focusing on AI accelerators or related technologies. Proficiency in ASIC or FPGA design flow, RTL design, and verification (using Verilog) Strong understanding of digital circuit design and computer architecture. Familiarity with neural network algorithms and computational models Experience with industry-standard EDA tools (e.g., Vivado more »

analytical and problem solving ability Great theoretical knowledge of various electronics hardware design technologies including: High-speed digital electronics design FPGA Firmware (VHDL/Verilog) Power Electronics Analogue Electronics RF design & Antennas Algorithm design and development PCB design & Layout Benefits: 12% Employer pension contribution Private medical insurance On site cafeteria more »

to our mission of delivering high-performance hardware systems to our clients. Key Responsibilities: Design and develop FPGA architectures and modules. Implement VHDL/Verilog code for FPGA devices. Perform simulation, synthesis, and timing analysis. Debug and optimize FPGA designs. Collaborate with cross-functional teams to ensure seamless integration. Provide more »

to our mission of delivering high-performance hardware systems to our clients. Key Responsibilities: Design and develop FPGA architectures and modules. Implement VHDL/Verilog code for FPGA devices. Perform simulation, synthesis, and timing analysis. Debug and optimize FPGA designs. Collaborate with cross-functional teams to ensure seamless integration. Provide more »

investigation, identification, and resolution Mentoring Junior Engineers. Basic Qualifications/Experience Experience developing MCU and FPGA based products Analogue and Digital Design knowledge FPGA (Verilog/VHDL) design knowledge Developing and utilising test benches for comprehensive verification of FPGA designs. A proven track record of designing for Xilinx, Intel or more »

investigation, identification, and resolution Mentoring Junior Engineers. Basic Qualifications/Experience Experience developing MCU and FPGA based products Analogue and Digital Design knowledge FPGA (Verilog/VHDL) design knowledge Developing and utilising test benches for comprehensive verification of FPGA designs. A proven track record of designing for Xilinx, Intel or more »

multi-task between program management and product development Experience with analog and digital circuit analysis, with modelling and simulation tool experience(SIMPLIS, LTSPICE, System Verilog, etc) Experience with multi-phase regulator(Buck, Boost, Buck-Boost), ADC, and able to lead SOC Power Management IC Experience and knowledge with automation utilizing more »

verification of designs Skills and Experience Required: Extensive experience with FPGA at the HDL level Comprehensive previous work with FPGA design and verification (i.e. Verilog/VHDL, Modelism etc.) Previous hands-on work with lab instruments (i.e. digital oscilloscopes, RF signal generators) Experience in digital signal processing or board-level more »

art EDA tools for DFT, design, and verification (Mentor, Cadence, Synopsys) STA DFT Test mode timing constraint development and analysis In-depth knowledge of Verilog HDL and experience with simulators and waveform debugging tools TCL scripting; Python scripting is a plus Bachelor Degree minimum required in Electronics or other related more »

art EDA tools for DFT, design, and verification (Mentor, Cadence, Synopsys) STA DFT Test mode timing constraint development and analysis In-depth knowledge of Verilog HDL and experience with simulators and waveform debugging tools TCL scripting; Python scripting is a plus Bachelor Degree minimum required in Electronics or other related more »

art EDA tools for DFT, design, and verification (Mentor, Cadence, Synopsys) STA DFT Test mode timing constraint development and analysis In-depth knowledge of Verilog HDL and experience with simulators and waveform debugging tools TCL scripting; Python scripting is a plus Bachelor Degree minimum required in Electronics or other related more »

art EDA tools for DFT, design, and verification (Mentor, Cadence, Synopsys) STA DFT Test mode timing constraint development and analysis In-depth knowledge of Verilog HDL and experience with simulators and waveform debugging tools TCL scripting; Python scripting is a plus Bachelor Degree minimum required in Electronics or other related more »

Digital High speed + Low Power PCB Design, Schematics Circuit Design + Integration Digital Signal Processes (DSP) (nice to have) Firmware Integration (FPGA, Microcontrollers) Verilog, Embedded C 3+ years experience They are business, within the medical industry, looking to make real life differences on a global scale. They are full more »

should you have? Along with a problem solving, challenger mindset, you will have a number of years experience with FPGA design and verification VHDL (Verilog, HDL, Modelsim etc). Also, they use Python here and toolsets such as: Xlinux, Toolflow, Numerical libraries i.e. numpie. A background in wireless communications would more »

and frequency costs of features by understanding their logical and physical realizations. Correlate cycle-accurate model performance to the actual design performance in RTL Verilog simulation Perform workload characterization and analysis by gaining an understanding a deep understanding of relevant workloads, tracing possible bottlenecks, and devising ideas to mitigate them. more »

and frequency costs of features by understanding their logical and physical realizations. Correlate cycle-accurate model performance to the actual design performance in RTL Verilog simulation Perform workload characterization and analysis by gaining an understanding a deep understanding of relevant workloads, tracing possible bottlenecks, and devising ideas to mitigate them. more »