26 to 50 of 89 Permanent Verilog Jobs

/MS in Electrical Engineering, Computer Engineering, or Computer Science 5+ years’ hands-on experience in microarchitecture and RTL development Strong proficiency in Verilog and SystemVerilog Familiarity with industry-standard EDA tools and methodologies Experience with large, high-speed, pipelined, and low-power designs Deep understanding of on-chip interconnects ...

Engineering, or related field. Experience 5+ years FPGA design, FPGA firmware or related work experience. 5+ years of direct hands-on experience with System Verilog, RTL/HDL, FPGA (Xilinx Ultrascale, Ultrascale+, MPSoC, Intel Stratix) and FPGA Tools (Xilinx, Intel) Excellent interpersonal and analytical skills with the ability to work … crossing, high speed designs, and timing closure techniques Exposure to VLSI design concepts, logic design 8+ years of direct hands-on experience with System Verilog, RTL/HDL, FPGA (Xilinx Ultrascale, Ultrascale+, MPSoC, Intel Stratix) and FPGA Tools (Xilinx, Intel) Direct hands-on experience with C++ (x86, aarch64) and Python ...

security- or cryptography-related field + 2 years of experience. Strong knowledge of cryptographic algorithms and hardware architectures. Proficiency in Verilog and SystemVerilog. Experience developing testbenches for verification. Familiarity with RISC-V processor cores. Post-quantum cryptography experience is highly desirable. Additional Information Sponsorship can be provided for candidates already ...

security- or cryptography-related field + 2 years of experience. Strong knowledge of cryptographic algorithms and hardware architectures. Proficiency in Verilog and SystemVerilog. Experience developing testbenches for verification. Familiarity with RISC-V processor cores. Post-quantum cryptography experience is highly desirable. Additional Information Sponsorship can be provided for candidates already ...

security- or cryptography-related field + 2 years of experience. Strong knowledge of cryptographic algorithms and hardware architectures. Proficiency in Verilog and SystemVerilog. Experience developing testbenches for verification. Familiarity with RISC-V processor cores. Post-quantum cryptography experience is highly desirable. Additional Information Sponsorship can be provided for candidates already ...

systems Experience with microcontrollers and communication interfaces (SPI, I2C, UART, CAN, etc.) Exposure to or interest in FPGA-based systems (knowledge of VHDL/Verilog a plus) If you’re an embedded engineer who enjoys seeing your designs come to life in real hardware, this is a great opportunity ...

architecture team for the purposes of system modelling. Support of the system level verification team in the modelling of analog circuits in Verilog and in the debug of identified issues Assist with silicon bring up and debug. PREFERRED EXPERIENCE: Good analog circuit design and analysis skills Experience with industry standard ...

Automotive communications protocols e.g. CAN Experience with Unit Testing and Static Analysis Experience with STM32 product family and architecture Experience with HDL (VHDL or Verilog) Experience running and taking part in code reviews Experience with Linux About You... Keen interest in new and emerging technologies Personal interest in engineering outside ...

providing technical leadership within a dynamic team. Candidates should possess extensive experience in IC design verification, strong problem-solving abilities, and proficiency in System Verilog-UVM. An opportunity to significantly influence the team's future direction is offered in this full-time position. ...

digital/mixed signal analog Verification with test bench design, connect modules, electrical/discrete partitioning.Good Scripting skills.Cadence APS, SpectreX/digital solver.System Verilog Assertions.Cadence Virtuoso Framework: Schematic editor, Assembler, AMS.High-speed communication systems such as SerDes.Good digital verification background with some Specman/SV UVM exposure and/ ...

have: Proven experience within AMS (Analog Mixed Signal) Verification Expertise in test bench design, behavioral modelling An understanding of analog blocks Experience in System Verilog Assertions A University degree within Microelectronics or similar field Excellent communication and team working skills Our client offers a competitive salary, stock options and visa ...

have: Proven experience within AMS (Analog Mixed Signal) Verification Expertise in test bench design, behavioral modelling An understanding of analog blocks Experience in System Verilog Assertions A University degree within Microelectronics or similar field Excellent communication and team working skills Our client offers a competitive salary, stock options and visa ...

deliver the design to physical implementation, ensuring compliance with timing, area, power, reliability, and testability goals Qualifications Strong understanding of microprocessor architecture Proficiency with Verilog and/or VHDL Solid grasp of logic design principles, including timing and power considerations Knowledge of low-power micro-architecture techniques Understanding of high ...

process technologies and beyond to support the delivery of SerDes IP Participate in internal customer requirements discussions Create design specifications Create behavioural models in Verilog Set up, run and analyse circuit simulations Perform quality assurance procedures on developed hard macros Deliver hard macros and support customer integration and testing Perform ...

Domo Tactical Communications operates in fast growing markets offering innovative and robust wireless security products, leading-edge IP centric network devices, and C4I application software solutions, along with high performance wireless broadcast systems for all ...

chip lead/or SOC architect Digital/AMS, analog-mixed-signal IP End to end chip/SOC delivery experience ASIC & FPGA - verilog, system verilog, VHDL ADC/DAC - digital - analog interfaces Functional verification - system verilog - IP, system, sub-system, block, top level experience Creation of test-benches detailed ...

design verification or related work experience. Proven expertise in developing verification plans for complex digital blocks Proficiency in creating and debugging System Verilog-UVM testbench environments at IP and/or Subsystem levels Experience in constrained random stimulus generation and coverage closure Competence in Gate-Level Simulation (GLS) setup … solving capabilities Strong communication skills required to work with local and wider global silicon development team Preferred Qualifications Experience in formal verification and System Verilog Assertions coding Exposure to mixed-signal verification or analog behavior modelling (ADC/DAC/PLL/Sensors) is an added advantage Exposure to Ethernet ...

side channel vulnerabilities and appropriate countermeasures Deliver production ready designs targeting both ASIC and FPGA platforms Own the design lifecycle: specification, micro-architecture, coding (Verilog/VHDL), synthesis, timing closure, and verification Support design activities through scripting and automation (Python or similar) for verification, analysis, and testing workflows Partner effectively … architectures Expertise in cryptographic primitive design and implementation Experience translating algorithms into efficient hardware designs, with an emphasis on power and area optimisation Solid Verilog/VHDL experience with hands-on verification knowledge, and timing analysis awareness Standard Information: Stock options - a genuine stake in the future you're helping ...

side channel vulnerabilities and appropriate countermeasures Deliver production ready designs targeting both ASIC and FPGA platforms Own the design lifecycle: specification, micro-architecture, coding (Verilog/VHDL), synthesis, timing closure, and verification Support design activities through scripting and automation (Python or similar) for verification, analysis, and testing workflows Partner effectively … architectures Expertise in cryptographic primitive design and implementation Experience translating algorithms into efficient hardware designs, with an emphasis on power and area optimisation Solid Verilog/VHDL experience with hands-on verification knowledge, and timing analysis awareness Standard Information: Stock options - a genuine stake in the future you're helping ...

side channel vulnerabilities and appropriate countermeasures Deliver production ready designs targeting both ASIC and FPGA platforms Own the design lifecycle: specification, micro-architecture, coding (Verilog/VHDL), synthesis, timing closure, and verification Support design activities through scripting and automation (Python or similar) for verification, analysis, and testing workflows Partner effectively … architectures Expertise in cryptographic primitive design and implementation Experience translating algorithms into efficient hardware designs, with an emphasis on power and area optimisation Solid Verilog/VHDL experience with hands-on verification knowledge, and timing analysis awareness Standard Information: Stock options - a genuine stake in the future you're helping ...

side channel vulnerabilities and appropriate countermeasures Deliver production ready designs targeting both ASIC and FPGA platforms Own the design lifecycle: specification, micro-architecture, coding (Verilog/VHDL), synthesis, timing closure, and verification Support design activities through scripting and automation (Python or similar) for verification, analysis, and testing workflows Partner effectively … architectures Expertise in cryptographic primitive design and implementation Experience translating algorithms into efficient hardware designs, with an emphasis on power and area optimisation Solid Verilog/VHDL experience with hands-on verification knowledge, and timing analysis awareness Standard Information: Stock options - a genuine stake in the future you're helping ...

side channel vulnerabilities and appropriate countermeasures Deliver production ready designs targeting both ASIC and FPGA platforms Own the design lifecycle: specification, micro-architecture, coding (Verilog/VHDL), synthesis, timing closure, and verification Support design activities through scripting and automation (Python or similar) for verification, analysis, and testing workflows Partner effectively … architectures Expertise in cryptographic primitive design and implementation Experience translating algorithms into efficient hardware designs, with an emphasis on power and area optimisation Solid Verilog/VHDL experience with hands-on verification knowledge, and timing analysis awareness Standard Information: Stock options - a genuine stake in the future you're helping ...

side channel vulnerabilities and appropriate countermeasures Deliver production ready designs targeting both ASIC and FPGA platforms Own the design lifecycle: specification, micro-architecture, coding (Verilog/VHDL), synthesis, timing closure, and verification Support design activities through scripting and automation (Python or similar) for verification, analysis, and testing workflows Partner effectively … architectures Expertise in cryptographic primitive design and implementation Experience translating algorithms into efficient hardware designs, with an emphasis on power and area optimisation Solid Verilog/VHDL experience with hands-on verification knowledge, and timing analysis awareness Standard Information: Stock options - a genuine stake in the future you're helping ...

side channel vulnerabilities and appropriate countermeasures Deliver production ready designs targeting both ASIC and FPGA platforms Own the design lifecycle: specification, micro-architecture, coding (Verilog/VHDL), synthesis, timing closure, and verification Support design activities through scripting and automation (Python or similar) for verification, analysis, and testing workflows Partner effectively … architectures Expertise in cryptographic primitive design and implementation Experience translating algorithms into efficient hardware designs, with an emphasis on power and area optimisation Solid Verilog/VHDL experience with hands-on verification knowledge, and timing analysis awareness Standard Information: Stock options - a genuine stake in the future you're helping ...

side channel vulnerabilities and appropriate countermeasures Deliver production ready designs targeting both ASIC and FPGA platforms Own the design lifecycle: specification, micro-architecture, coding (Verilog/VHDL), synthesis, timing closure, and verification Support design activities through scripting and automation (Python or similar) for verification, analysis, and testing workflows Partner effectively … architectures Expertise in cryptographic primitive design and implementation Experience translating algorithms into efficient hardware designs, with an emphasis on power and area optimisation Solid Verilog/VHDL experience with hands-on verification knowledge, and timing analysis awareness Standard Information: Stock options - a genuine stake in the future you're helping ...