speed I/O like GTM and F-Tile transceivers Expertise in FPGA tool flows: synthesis, partitioning, place & route, timing analysis Strong skills in SystemVerilog, Verilog, VHDL, and scripting (tcl and Python) Experience with high-performance FPGA devices such as Xilinx Versal Premium or Intel Agilex 7 If you're More ❯
Science (CS), or a related technical field. Prior experience in designing, coding, testing, and verifying FPGAs and/or ASICs. Proficiency in VHDL, Verilog, SystemVerilog, as well as C or C++ programming languages. Familiarity with RTL synthesis and the ability to write timing, area, and other pertinent constraints. Experience working More ❯
language. Understanding of computer architecture fundamentals, such as pipelining, exception handling, memory systems. Perhaps some practical experience of working on microprocessor designs. Familiarity with SystemVerilog, maybe using a methodology such as UVM. Python programming experience, for example to automate verification flows. C++ programming experience, maybe in the context of a More ❯
levels welcome Proven experience verifying large System on Chip (SoC) designs. Expertise in DSP, Wireless Communication, and networking standards. Hands-on experience with Verilog, SystemVerilog, UVM, and/or VHDL. Strong verification mindset with in-depth knowledge of verification goals, practices, and methodologies. Practical experience with scripting languages such as More ❯
immense potential in quantum technology. The ideal Senior FPGA Engineer will have: Strong experience of FPGA implementation in real-time system contexts Proficiency in SystemVerilog or Migen Solid understanding of real-time hardware/software co-design and debugging Experience with common software languages (Python, Rust, etc.) Familiarity with version More ❯
products, including microcontrollers and connectivity SoC/IP subsystem verification planning, test infrastructure development, functional verification. Test bench and test case generation using Verilog, SystemVerilog, UVM, C, Formal. Embedded C code or writing CPU-centric tests using C. Qualifications MSc in electrical engineering or equivalent or Bachelor with industrial experience More ❯
and test plan, run regressions, reproduce, and debug functional and performance bugs. Proficiency with EDA tools (Candence, Mentor) and design languages including Verilog and systemVerilog Understanding of synthesis, static timing analysis, and netlist verifications UVM expertise Please note: You must have full UK working rights to be considered for this More ❯
a chance to contribute to industry-leading ASIC and SoC solutions in a dynamic, fast-paced environment. Key Skills & Experience Sought: Digital verification with SystemVerilog, UVM, or cocotb Computer architecture knowledge (ARM or RISC-V) Formal verification techniques Interconnect protocols: AXI or OCP ASIC design tool flows Exposure to OpenGL More ❯
a chance to contribute to industry-leading ASIC and SoC solutions in a dynamic, fast-paced environment. Key Skills & Experience Sought: Digital verification with SystemVerilog, UVM, or cocotb Computer architecture knowledge (ARM or RISC-V) Formal verification techniques Interconnect protocols: AXI or OCP ASIC design tool flows Exposure to OpenGL More ❯
track issues to resolution. Develop and maintain automated regression test infrastructure and gatekeepers. Requirements Deep expertise in industry-standard verification methodologies, including proficiency with SystemVerilog and UVM. Ability to think creatively about solutions outside of UVM. Experience with high-speed networking interfaces and protocols like PCIe, SERDES or Ethernet. Demonstrated More ❯
of a testbench Be able to do root-cause analysis of complex issues and resolve them in a timely manner Have excellent knowledge of SystemVerilog and UVM Be able to develop new verification flows Remote opportunities can be considered for candidates who possess technical excellence. For more information and a More ❯
development of high-speed network interface cards. Key responsibilities will include Microarchitecture definition, RTL Implementation/synthesis/timing closure, Verification/Testing using SystemVerilog and delivering & validating FPGA based lab setups for trials. The successful candidate will have a good relevant degree, along with: Extensive hand on industry experience … IP. Comprehensive understanding of clock domain crossing techniques. Strong knowledge of FPGA tool flows (synthesis, partitioning, place & route, timing analysis). Excellent skills in SystemVerilog/Verilog/VHDL. Scripting in Python/Tcl Driver expertise The company offer an excellent salary, along with a bonus up to 85%, flexible More ❯
At Ouster, we build sensors and tools for engineers, roboticists, and researchers, so they can make the world safer and more efficient. We've transformed LIDAR from an analog device with thousands of components to an elegant digital device powered More ❯
Firmware/FPGA Engineer Location: Multiple locations across the UK (Bristol, Bedfordshire, London, Essex) Contract Type: Inside IR35 Clearance: British Sole Passport Holder and SC Cleared or SC Clearable. Who: A leading services company specializing in Defence systems dedicated to More ❯
Systems/FPGA Team Lead Up to 180,000 USD + Bonus + Comprehensive Benefits We are working exclusively with a cutting-edge proprietary trading firm aiming to grow its FPGA Engineering team as part of its global expansion. Operating More ❯
are robust, high-performing, and built to scale. What you will be doing: • Creating and executing thorough verification plans for complex hardware designs • Developing SystemVerilog/UVM testbenches for functional verification • Running directed and constrained-random tests • Maintaining regression suites to validate design quality • Supporting system-level performance validation • Debugging … design engineers • Using formal verification techniques when appropriate Requirements: • 5+ years of hands-on experience in hardware verification (preferably in SoCs) • Strong skills in SystemVerilog and UVM • Experience with modern verification tools (ABV, CDV, etc.) • Bonus: Experience with GPU, vector processors, or AI accelerators • Bonus: Familiarity with RISC-V architecture More ❯
with formal verification tools (e.g., Cadence JasperGold, Synopsys VC Formal, or equivalent tools). Hands-on experience with RTL design languages such as Verilog, SystemVerilog, or VHDL. Experience with verification methodologies such as UVM (Universal Verification Methodology) or other simulation-based verification techniques. Experience with assertions (e.g., SVA - SystemVerilog Assertions More ❯
in verifying the functionality and performance of our cutting-edge products. Responsibilities Develop and implement verification plans for complex ASIC designs Write and maintain SystemVerilog testbenches and test cases Create and execute UVM-based verification environments Collaborate with cross-functional teams to ensure design and verification goals are met Debug … Bachelor’s or Master's degree in Electrical Engineering, Computer Engineering, or related field Solid understanding of ASIC verification methodologies and tools Proficiency in SystemVerilog and UVM Experience with verification of neuromorphic chips and AI accelerators is a plus Strong problem-solving and debugging skills You must have UK working More ❯
My client is developing a solution for the quantum cryptography problem. They're looking for verification engineers at all levels. Fascinating technology, senior management has an excellent technical pedigree and an opportunity to enter into a field of quantum engineering More ❯
Senior Digital Design Engineer Bristol – 3 days onsite £75,000 - £95,000 DOE An exciting opportunity has arisen for a Senior Digital Design engineer to make the next step in their career and join an industry leading company designing ASICs More ❯
About Us At Dabster, we specialize in connecting top talent with leading global companies. We are currently seeking an experienced SOC Integration Lead Engineer to join our client's team. Our mission is to be the foremost recruitment specialist in More ❯
