design and verification, is highly desirable. Proven track record of delivering circuit designs with minimal supervision. Contributions to the development of analogue design flows and methodologies. Working knowledge of Verilog-AMS modelling, MATLAB and Python is a bonus. Familiar with the use of laboratory equipment e.g. spectrum analysers, digital oscilloscopes, signal generators. Enthusiastic about analogue circuit design. Enjoy being part More ❯
Cambridge, Cambridgeshire, United Kingdom Hybrid / WFH Options
Arm Limited
performance design issues. Exploration and implementation of technologies and methodologies to improve GPU power, performance and area (PPA). Required Skills and Experience : Experience with hardware description languages (System Verilog preferable). Experience using EDA simulators (Siemens, Synopsys, Cadence) Strong problem solving and debugging skills, and ability to closely collaborate with other teams. Experience working with version control and code More ❯
Cambridge, Cambridgeshire, United Kingdom Hybrid / WFH Options
Arm Limited
dedicated FPGA prototyping platform. Debugging of test failures and issues by working in collaboration with the design teams and FPGA users. Required Skills and Experience: Strong RTL skills in Verilog/System Verilog with source code under version control. Understanding of Arm based systems, including SoC system architecture and AMBA protocols. Experience of working with high speed I/O More ❯
Cambridge, Cambridgeshire, England, United Kingdom
MicroTECH Global Ltd
Our client make hardware-accelerated architecture enables real-time transactional AI at scale, eliminating bottlenecks in data-intensive environments. Main Responsibilities: Design, develop, and verify FPGA modules in Verilog/SystemVerilog and VHDL Translate novel functional computing models into optimised RTL architectures Implement high-throughput, pipelined digital logic and memory interfaces Contribute to simulation, synthesis, debug, and validation of designs … RTL and contribute to documentation, DFT/DFM, and version control workflows Key Requirements: Minimum 7 years of post-graduate experience in digital hardware design (FPGA/ASIC) and Verilog/SystemVerilog experience (or 15 years total experience with strong VHDL background)High-level logic synthesis and simulation toolsHands-on experience with Intel Quartus Prime Pro toolchainRTL design in VerilogMore ❯
models. Measure and analyze coverage results and take necessary actions to fill in coverage holes. PREFERRED EXPERIENCE: Understanding or technical expertise in functional verification of microprocessor designs. Experience with Verilog/System Verilog HDL, programming in Perl, C/C++, and logic simulation is a requirement. Direct experience with Verilog simulators is a plus. Very strong understanding of computer architecture More ❯
in ASIC design, integration, or verification. Must have expertise in some of the following domains: processor design, on-chip communication and interconnects, high-speed interfaces, or chiplets. Expertise in Verilog/System Verilog for coding and verification. Proficiency in RTL design techniques, including synthesis, timing closure, and verification. Experience in using UVM for functional verification of ASIC designs. Experience with More ❯
successful in this role, you will need: - A degree in Electronics, Computer Science, Engineering, Physics, or a related field - Formal Verification skills - Strong mathematical and analytical skills - Proficiency in Verilog and/or VHDL - Excellent communication and interpersonal skills - Knowledge of other hardware description languages and verification tools is a plus We are looking for a skilled and passionate Verification … culture, where you can share your ideas and feedback with everyone. Position : Formal Verification Engineer Location : Cambridge Salary : £30-70k + benefits Key Skills : ASIC/FPGA verification, Verilog, VHDL, RTL More ❯
verification solutions. Key Responsibilities: Perform SOC verification with a focus on ARM ecosystem and PCIe, including PCIe-VIP usage. Develop and execute test plans, test benches, and simulations using Verilog, SystemVerilog, and UVM. Conduct GLS (Gate Level Simulation) and ensure comprehensive code and functional coverage. Collaborate with onsite and offshore teams to coordinate verification activities and deliverables. Utilize GIT for … strong analytical and problem-solving skills throughout the verification process. Skills, Experience, and Abilities Required: 5 to 10 years of industry experience in SOC/IP verification. Expertise in Verilog, SystemVerilog, and UVM. Strong experience with code coverage, functional coverage, and test development. Hands-on experience with ARM ecosystem and PCIe protocols. Proficient in C/SystemVerilog and familiar with More ❯